[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5a727aa8-4620-7019-4f45-e78ab6c52b04@opensource.wdc.com>
Date: Wed, 1 Mar 2023 10:19:27 +0900
From: Damien Le Moal <damien.lemoal@...nsource.wdc.com>
To: Jesse Taube <mr.bossman075@...il.com>,
linux-riscv@...ts.infradead.org
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
Yimin Gu <ustcymgu@...il.com>, Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Waldemar Brodkorb <wbx@...nadk.org>,
Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Conor Dooley <conor.dooley@...rochip.com>,
kernel test robot <lkp@...el.com>
Subject: Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division
On 3/1/23 09:26, Jesse Taube wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> The K210 clock driver depends on SOC_CANAAN, which is only selectable
> when !MMU on RISC-V. !MMU is not possible on 32-bit yet, but patches
> have been sent for its enabling. The kernel test robot reported this
> implicit 64-bit division there.
>
> Replace the implicit division with an explicit one.
>
> Reported-by: kernel test robot <lkp@...el.com>
> Link: https://lore.kernel.org/linux-riscv/202301201538.zNlqgE4L-lkp@intel.com/
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: Jesse Taube <Mr.Bossman075@...il.com>
Looks OK to me.
Reviewed-by: Damien Le Moal <damien.lemoal@...nsource.wdc.com>
--
Damien Le Moal
Western Digital Research
Powered by blists - more mailing lists