linux-kernel - Re: [PATCH v1 3/4] arm64: dts: mt8195: Align vppsys node to dtschema

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Message-ID: <380b32fc-6e9b-6f7d-e8ff-063346ee1d27@gmail.com>
Date:   Thu, 2 Mar 2023 12:07:00 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     matthias.bgg@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org
Cc:     devicetree@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        angelogioacchino.delregno@...labora.com
Subject: Re: [PATCH v1 3/4] arm64: dts: mt8195: Align vppsys node to dtschema



On 09/02/2023 17:03, matthias.bgg@...nel.org wrote:
> From: Matthias Brugger <matthias.bgg@...il.com>
> 
> As the node is a syscon, this has to be reflected in the compatible and
> the node name.
> 
> Signed-off-by: Matthias Brugger <matthias.bgg@...il.com>

A similar patch is already in v6.3-tmp/dts64:
168136cbef9c ("arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS")

I'll drop this one as well.
My bad, I should have noticed that earlier.

Regards,
Matthias

> ---
> 
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 8f1264d5290bf..5261367031426 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1795,8 +1795,8 @@ mfgcfg: clock-controller@...bf000 {
>   			#clock-cells = <1>;
>   		};
>   
> -		vppsys0: clock-controller@...00000 {
> -			compatible = "mediatek,mt8195-vppsys0";
> +		vppsys0: syscon@...00000 {
> +			compatible = "mediatek,mt8195-vppsys0", "syscon";
>   			reg = <0 0x14000000 0 0x1000>;
>   			#clock-cells = <1>;
>   		};
> @@ -1900,8 +1900,8 @@ larb8: larb@...05000 {
>   			power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
>   		};
>   
> -		vppsys1: clock-controller@...00000 {
> -			compatible = "mediatek,mt8195-vppsys1";
> +		vppsys1: syscon@...00000 {
> +			compatible = "mediatek,mt8195-vppsys1", "syscon";
>   			reg = <0 0x14f00000 0 0x1000>;
>   			#clock-cells = <1>;
>   		};