linux-kernel - Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <be589843-dfc1-47dc-a488-a4fad645c638@spud>
Date:   Mon, 6 Mar 2023 22:35:01 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Stephen Boyd <sboyd@...nel.org>
Cc:     Jesse Taube <mr.bossman075@...il.com>,
        linux-riscv@...ts.infradead.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, Yimin Gu <ustcymgu@...il.com>,
        Damien Le Moal <damien.lemoal@....com>,
        Michael Turquette <mturquette@...libre.com>,
        Waldemar Brodkorb <wbx@...nadk.org>,
        Albert Ou <aou@...s.berkeley.edu>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Conor Dooley <conor.dooley@...rochip.com>,
        kernel test robot <lkp@...el.com>
Subject: Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division

On Mon, Mar 06, 2023 at 02:31:00PM -0800, Stephen Boyd wrote:
> Quoting Jesse Taube (2023-02-28 16:26:55)
> > diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c
> > index 67a7cb3503c3..4eed667eddaf 100644
> > --- a/drivers/clk/clk-k210.c
> > +++ b/drivers/clk/clk-k210.c
> > @@ -495,7 +495,7 @@ static unsigned long k210_pll_get_rate(struct clk_hw *hw,
> >         f = FIELD_GET(K210_PLL_CLKF, reg) + 1;
> >         od = FIELD_GET(K210_PLL_CLKOD, reg) + 1;
> >  
> > -       return (u64)parent_rate * f / (r * od);
> > +       return div_u64((u64)parent_rate * f, r * od);
> 
> The equation 'r * od' can't overflow 32-bits, right?

Yah, I checked that when writing the patch. They're 4-bit fields:
> /*
>  * PLL control register bits.
>  */
> #define K210_PLL_CLKR		GENMASK(3, 0)
> #define K210_PLL_CLKF		GENMASK(9, 4)
> #define K210_PLL_CLKOD		GENMASK(13, 10)

Cheers,
Conor.


Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)