linux-kernel - Re: [PATCH 2/2] soc: qcom: llcc: Add configuration data for SM7150

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Message-ID: <86c98c57-08a7-20b3-2346-803b497d562a@linaro.org>
Date:   Mon, 6 Mar 2023 11:41:53 +0100
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Danila Tikhonov <danila@...xyga.com>, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, agross@...nel.org,
        andersson@...nel.org, abel.vesa@...aro.org,
        rishabhb@...eaurora.org, saiprakash.ranjan@...eaurora.org
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH 2/2] soc: qcom: llcc: Add configuration data for SM7150



On 5.03.2023 21:26, Danila Tikhonov wrote:
> Add LLCC configuration data for SM7150 SoC.
> 
> Signed-off-by: Danila Tikhonov <danila@...xyga.com>
> ---
I checked the msm-4.14 data, everything lgtm

Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Konrad
>  drivers/soc/qcom/llcc-qcom.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 23ce2f78c4ed..0ed8cd4f66da 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -227,6 +227,14 @@ static const struct llcc_slice_config sm6350_data[] =  {
>  	{ LLCC_MODPE,    29,  64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
>  };
>  
> +static const struct llcc_slice_config sm7150_data[] =  {
> +	{ LLCC_CPUSS,    1,  512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 1 },
> +	{ LLCC_MDM,      8,  128, 2, 0, 0xF, 0x0, 0, 0, 0, 1, 0 },
> +	{ LLCC_GPUHTW,   11, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
> +	{ LLCC_GPU,      12, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
> +	{ LLCC_NPU,      23, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 0 },
> +};
> +
>  static const struct llcc_slice_config sm8150_data[] =  {
>  	{  LLCC_CPUSS,    1, 3072, 1, 1, 0xFFF, 0x0,   0, 0, 0, 1, 1 },
>  	{  LLCC_VIDSC0,   2, 512,  2, 1, 0xFFF, 0x0,   0, 0, 0, 1, 0 },
> @@ -464,6 +472,14 @@ static const struct qcom_llcc_config sm6350_cfg = {
>  	.edac_reg_offset = &llcc_v1_edac_reg_offset,
>  };
>  
> +static const struct qcom_llcc_config sm7150_cfg = {
> +	.sct_data       = sm7150_data,
> +	.size           = ARRAY_SIZE(sm7150_data),
> +	.need_llcc_cfg	= true,
> +	.reg_offset	= llcc_v1_reg_offset,
> +	.edac_reg_offset = &llcc_v1_edac_reg_offset,
> +};
> +
>  static const struct qcom_llcc_config sm8150_cfg = {
>  	.sct_data       = sm8150_data,
>  	.size           = ARRAY_SIZE(sm8150_data),
> @@ -1022,6 +1038,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
>  	{ .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg },
>  	{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },
>  	{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },
> +	{ .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfg },
>  	{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
>  	{ .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg },
>  	{ .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfg },