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Message-ID: <mhng-0ef61e01-7731-4c5f-9487-e4ab8553b87c@palmer-ri-x1c9a>
Date: Tue, 07 Mar 2023 12:55:45 -0800 (PST)
From: Palmer Dabbelt <palmer@...belt.com>
To: samuel@...lland.org
CC: clabbe.montjoie@...il.com, herbert@...dor.apana.org.au,
davem@...emloft.net, wens@...e.org, jernej.skrabec@...il.com,
krzysztof.kozlowski+dt@...aro.org, robh+dt@...nel.org,
samuel@...lland.org, aou@...s.berkeley.edu,
Conor Dooley <conor@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-sunxi@...ts.linux.dev
Subject: Re: [PATCH v2 3/3] riscv: dts: allwinner: d1: Add crypto engine node
On Sat, 31 Dec 2022 14:01:45 PST (-0800), samuel@...lland.org wrote:
> D1 contains a crypto engine which is supported by the sun8i-ce driver.
>
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
>
> Changes in v2:
> - New patch for v2
>
> arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index dff363a3c934..b30b4b1465f6 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -378,6 +378,18 @@ sid: efuse@...6000 {
> #size-cells = <1>;
> };
>
> + crypto: crypto@...0000 {
> + compatible = "allwinner,sun20i-d1-crypto";
> + reg = <0x3040000 0x800>;
> + interrupts = <SOC_PERIPHERAL_IRQ(52) IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_CE>,
> + <&ccu CLK_CE>,
> + <&ccu CLK_MBUS_CE>,
> + <&rtc CLK_IOSC>;
> + clock-names = "bus", "mod", "ram", "trng";
> + resets = <&ccu RST_BUS_CE>;
> + };
> +
> mbus: dram-controller@...2000 {
> compatible = "allwinner,sun20i-d1-mbus";
> reg = <0x3102000 0x1000>,
Acked-by: Palmer Dabbelt <palmer@...osinc.com>
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