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Message-ID: <1587de60-244a-d97f-dea0-36fe8a5be2c2@linaro.org>
Date: Tue, 7 Mar 2023 09:20:23 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
andersson@...nel.org, lpieralisi@...nel.org, kw@...ux.com,
krzysztof.kozlowski+dt@...aro.org, robh@...nel.org
Cc: konrad.dybcio@...aro.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, quic_srichara@...cinc.com
Subject: Re: [PATCH 16/19] arm64: dts: qcom: sdm845: Add "mhi" region to the
PCIe nodes
On 06/03/2023 16:32, Manivannan Sadhasivam wrote:
> The "mhi" region contains the debug registers that could be used to monitor
> the PCIe link transitions.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 479859bd8ab3..0104e77dd8d5 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2280,10 +2280,11 @@ opp-4 {
> pcie0: pci@...0000 {
> compatible = "qcom,pcie-sdm845";
> reg = <0 0x01c00000 0 0x2000>,
> + <0 0x01c07000 0 0x1000>,
> <0 0x60000000 0 0xf1d>,
> <0 0x60000f20 0 0xa8>,
> <0 0x60100000 0 0x100000>;
> - reg-names = "parf", "dbi", "elbi", "config";
> + reg-names = "parf", "mhi", "dbi", "elbi", "config";
Indexes are fixed, thus this breaks other users of DTS.
Best regards,
Krzysztof
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