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Message-ID: <CAGXv+5FVZWFcYNrsgMs_0s+J5E-ijxKjf9MRsLXhC7nWNj5pPA@mail.gmail.com>
Date:   Tue, 7 Mar 2023 17:28:21 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     airlied@...il.com, daniel@...ll.ch, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, steven.price@....com,
        alyssa.rosenzweig@...labora.com, matthias.bgg@...il.com,
        robh@...nel.org, dri-devel@...ts.freedesktop.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v4 00/12] Panfrost: Improve and add MediaTek SoCs support

On Tue, Feb 28, 2023 at 6:26 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
>
> Changes in v4:
>  - Refactored power-domains and power-domain-names exclusions as
>    suggested by Krzysztof
>  - Small changes in MT8192 bindings addition
>
> Changes in v3:
>  - Changed MT8186 bindings to declare only two power domains
>  - Added a commit introducing MT8186 specific platform data to
>    panfrost_drv
>
> Changes in v2:
>  - Add power-domain-names commit from Chen-Yu to the series
>  - Kept sram-supply in base schema, overridden for non-MediaTek
>  - Added Reviewed-by tags from Steven Price to the driver commits
>    (as released in reply to v1's cover letter - thanks!)
>
> This series adds support for new MediaTek SoCs (MT8186/MT8192/MT8195)
> and improves MT8183 support: since the mtk-regulator-coupler driver
> was picked, it is now useless for Panfrost to look for, and manage,
> two regulators (GPU Vcore and GPU SRAM) on MediaTek;
>
> The aforementioned driver will take care of keeping the voltage
> relation (/constraints) of the two regulators on its own when a
> voltage change request is sent to the Vcore, solving the old time
> issue with not working DVFS on Panfrost+MediaTek (due to devfreq
> supporting only single regulator).
>
> In the specific case of MT8183, in order to not break the ABI, it
> was necessary to add a new compatible for enabling DVFS.
>
> Alyssa Rosenzweig (3):
>   drm/panfrost: Increase MAX_PM_DOMAINS to 5
>   drm/panfrost: Add the MT8192 GPU ID
>   drm/panfrost: Add mediatek,mt8192-mali compatible
>
> AngeloGioacchino Del Regno (9):
>   dt-bindings: gpu: mali-bifrost: Split out MediaTek power-domains
>     variation
>   dt-bindings: gpu: mali-bifrost: Set power-domains maxItems to 5
>   dt-bindings: gpu: mali-bifrost: Fix power-domain-names validation
>   dt-bindings: gpu: mali-bifrost: Add sub-schema for MT8192's power
>     domains
>   dt-bindings: gpu: mali-bifrost: Add new MT8183 compatible
>   dt-bindings: gpu: mali-bifrost: Add support for MediaTek MT8186
>   dt-bindings: gpu: mali-bifrost: Add compatible for MT8195 SoC
>   drm/panfrost: Add new compatible for Mali on the MT8183 SoC
>   drm/panfrost: Add support for Mali on the MT8186 SoC

Tested-by: Chen-Yu Tsai <wenst@...omium.org>

on MT8183, MT8186, MT8192 and MT8195 Chromebooks.

But the cover letter wasn't properly threaded with the series.

BTW, Angelo, I see that Panfrost keeps the GPU regulator enabled, but
the power domains, and thus the SRAM regulator, get powered off when
the GPU is not in use. There doesn't seem to be any damaging effects,
but I worry about idle power consumption.

ChenYu

>  .../bindings/gpu/arm,mali-bifrost.yaml        | 80 ++++++++++++++++++-
>  drivers/gpu/drm/panfrost/panfrost_device.h    |  2 +-
>  drivers/gpu/drm/panfrost/panfrost_drv.c       | 37 +++++++++
>  drivers/gpu/drm/panfrost/panfrost_gpu.c       |  8 ++
>  4 files changed, 123 insertions(+), 4 deletions(-)
>
> --
> 2.39.2
>

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