linux-kernel - [PATCH 3/3] soc: fsl: cpm1: qmc: Fix assigned timeslot masks

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Date:   Tue,  7 Mar 2023 15:15:03 +0100
From:   Herve Codina <herve.codina@...tlin.com>
To:     Herve Codina <herve.codina@...tlin.com>,
        Li Yang <leoyang.li@....com>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Christophe Leroy <christophe.leroy@...roup.eu>,
        Michael Ellerman <mpe@...erman.id.au>,
        Nicholas Piggin <npiggin@...il.com>,
        Qiang Zhao <qiang.zhao@....com>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>,
        Shengjiu Wang <shengjiu.wang@...il.com>,
        Xiubo Li <Xiubo.Lee@...il.com>,
        Fabio Estevam <festevam@...il.com>,
        Nicolin Chen <nicoleotsuka@...il.com>
Cc:     linuxppc-dev@...ts.ozlabs.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, alsa-devel@...a-project.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: [PATCH 3/3] soc: fsl: cpm1: qmc: Fix assigned timeslot masks

The assigned timeslot masks are 64bit values.
In case of 64 timeslots the code uses (1 << 64) which is undefined on a
64bit value. On the PowerPC architecture, this lead to an incorrect
result as (1 << 64) produces the same result as (1 << 0).

Fix the masks values taking care of the 64 timeslots case.

Signed-off-by: Herve Codina <herve.codina@...tlin.com>
---
 drivers/soc/fsl/qe/qmc.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
index cfa7207353e0..b3c292c9a14e 100644
--- a/drivers/soc/fsl/qe/qmc.c
+++ b/drivers/soc/fsl/qe/qmc.c
@@ -754,6 +754,11 @@ static int qmc_check_chans(struct qmc *qmc)
 	if (ret)
 		return ret;
 
+	if ((info.nb_tx_ts > 64) || (info.nb_rx_ts > 64)) {
+		dev_err(qmc->dev, "Number of TSA Tx/Rx TS assigned not supported\n");
+		return -EINVAL;
+	}
+
 	/*
 	 * If more than 32 TS are assigned to this serial, one common table is
 	 * used for Tx and Rx and so masks must be equal for all channels.
@@ -766,9 +771,8 @@ static int qmc_check_chans(struct qmc *qmc)
 		is_one_table = true;
 	}
 
-
-	tx_ts_assigned_mask = (((u64)1) << info.nb_tx_ts) - 1;
-	rx_ts_assigned_mask = (((u64)1) << info.nb_rx_ts) - 1;
+	tx_ts_assigned_mask = info.nb_tx_ts == 64 ? U64_MAX : (((u64)1) << info.nb_tx_ts) - 1;
+	rx_ts_assigned_mask = info.nb_rx_ts == 64 ? U64_MAX : (((u64)1) << info.nb_rx_ts) - 1;
 
 	list_for_each_entry(chan, &qmc->chan_head, list) {
 		if (chan->tx_ts_mask > tx_ts_assigned_mask) {
-- 
2.39.2