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Message-ID: <167829261190.5837.14765105385267384206.tip-bot2@tip-bot2>
Date: Wed, 08 Mar 2023 16:23:31 -0000
From: "tip-bot2 for Andrew Cooper" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Tavis Ormandy <taviso@...il.com>,
Andrew Cooper <andrew.cooper3@...rix.com>,
"Borislav Petkov (AMD)" <bp@...en8.de>, <stable@...nel.org>,
x86@...nel.org, linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/CPU/AMD: Disable XSAVES on AMD family 0x17
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: b0563468eeac88ebc70559d52a0b66efc37e4e9d
Gitweb: https://git.kernel.org/tip/b0563468eeac88ebc70559d52a0b66efc37e4e9d
Author: Andrew Cooper <andrew.cooper3@...rix.com>
AuthorDate: Tue, 07 Mar 2023 17:46:43
Committer: Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Wed, 08 Mar 2023 16:56:08 +01:00
x86/CPU/AMD: Disable XSAVES on AMD family 0x17
AMD Erratum 1386 is summarised as:
XSAVES Instruction May Fail to Save XMM Registers to the Provided
State Save Area
This piece of accidental chronomancy causes the %xmm registers to
occasionally reset back to an older value.
Ignore the XSAVES feature on all AMD Zen1/2 hardware. The XSAVEC
instruction (which works fine) is equivalent on affected parts.
[ bp: Typos, move it into the F17h-specific function. ]
Reported-by: Tavis Ormandy <taviso@...il.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@...rix.com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Cc: <stable@...nel.org>
Link: https://lore.kernel.org/r/20230307174643.1240184-1-andrew.cooper3@citrix.com
---
arch/x86/kernel/cpu/amd.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 380753b..95cdd08 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -880,6 +880,15 @@ void init_spectral_chicken(struct cpuinfo_x86 *c)
}
}
#endif
+ /*
+ * Work around Erratum 1386. The XSAVES instruction malfunctions in
+ * certain circumstances on Zen1/2 uarch, and not all parts have had
+ * updated microcode at the time of writing (March 2023).
+ *
+ * Affected parts all have no supervisor XSAVE states, meaning that
+ * the XSAVEC instruction (which works fine) is equivalent.
+ */
+ clear_cpu_cap(c, X86_FEATURE_XSAVES);
}
static void init_amd_zn(struct cpuinfo_x86 *c)
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