linux-kernel - Re: drivers/gpu/drm/bridge/fsl-ldb.c:101: possible loss of information.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 9 Mar 2023 01:22:24 +0200
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     David Binderman <dcb314@...mail.com>
Cc:     "andrzej.hajda@...el.com" <andrzej.hajda@...el.com>,
        "neil.armstrong@...aro.org" <neil.armstrong@...aro.org>,
        "rfoss@...nel.org" <rfoss@...nel.org>,
        "jonas@...boo.se" <jonas@...boo.se>,
        "jernej.skrabec@...il.com" <jernej.skrabec@...il.com>,
        "airlied@...il.com" <airlied@...il.com>,
        "daniel@...ll.ch" <daniel@...ll.ch>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: drivers/gpu/drm/bridge/fsl-ldb.c:101: possible loss of
 information.

On Tue, Mar 07, 2023 at 04:45:24PM +0000, David Binderman wrote:
> Hello there,
> 
> I just ran the static analyser "cppcheck" over the source code of
> linux-6.2-rc1. It said:
> 
> linux-6.3-rc1/drivers/gpu/drm/bridge/fsl-ldb.c:101:3: style: int
> result is returned as long value. If the return value is long to avoid
> loss of information, then you have loss of information.
> [truncLongCastReturn]
> 
> Source code is
> 
> static unsigned long fsl_ldb_link_frequency(struct fsl_ldb *fsl_ldb, int clock)
> {
>     if (fsl_ldb->lvds_dual_link)
>         return clock * 3500;
>     else
>         return clock * 7000;
> }
> 
> Depending on the range of the value of clock, maybe unsigned long
> literals, like 3500UL, should have been used ?

We could, but I don't think it will make any difference in practice as
the maximum pixel clock frequency supported by the SoC is 80MHz (per
LVDS channel). That would result in a 560MHz frequency returned by this
function, well below the 31 bits limit.

-- 
Regards,

Laurent Pinchart