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Message-ID: <5aef7e908e1d492386d568ef36b75493@AcuMS.aculab.com>
Date: Wed, 8 Mar 2023 12:15:56 +0000
From: David Laight <David.Laight@...LAB.COM>
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Subject: RE: [PATCH v13 00/11] Parallel CPU bringup for x86_64
From: David Woodhouse
> Sent: 08 March 2023 09:05
...
> https://git.infradead.org/users/dwmw2/linux.git/shortlog/refs/heads/parallel-6.2-v14
>
> Looks like this:
>
> /*
> * We can do 64-bit AP bringup in parallel if the CPU reports its APIC
> * ID in CPUID (either leaf 0x0B if we need the full APIC ID in X2APIC
> * mode, or leaf 0x01 if 8 bits are sufficient). Otherwise it's too
> * hard.
> */
> static bool prepare_parallel_bringup(void)
> {
> bool has_sev_es = IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) &&
> static_branch_unlikely(&sev_es_enable_key);
>
> if (IS_ENABLED(CONFIG_X86_32))
> return false;
>
> /*
> * Encrypted guests other than SEV-ES (in the future) will need to
> * implement an early way of finding the APIC ID, since they will
> * presumably block direct CPUID too. Be kind to our future selves
> * by warning here instead of just letting them break. Parallel
> * startup doesn't have to be in the first round of enabling patches
> * for any such technology.
> */
> if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT) || !has_sev_es) {
> pr_info("Disabling parallel bringup due to guest memory encryption\n");
> return false;
> }
That looks wrong, won't has_sev_es almost always be false
so it prints the message and returns?
Maybe s/||/&&/ ?
David
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