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Message-Id: <1678277993-18836-1-git-send-email-quic_rohiagar@quicinc.com>
Date:   Wed,  8 Mar 2023 17:49:47 +0530
From:   Rohit Agarwal <quic_rohiagar@...cinc.com>
To:     agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        lee@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, mani@...nel.org,
        lpieralisi@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
        manivannan.sadhasivam@...aro.org
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
        Rohit Agarwal <quic_rohiagar@...cinc.com>
Subject: [PATCH v2 0/6] Add PCIe EP support for SDX65

Hi,

Changes in v2:
 - Addressing comments from Konrad and Dmitry.
 - Rebased on top of 6.3-rc1.

This series adds the devicetree support for PCIe PHY and PCIe EP on SDX65.
The PCIe EP is enabled on SDX65 MTP board.

Thanks,
Rohit.

Rohit Agarwal (6):
  dt-bindings: mfd: qcom,tcsr: Add compatible for sdx65
  dt-bindings: PCI: qcom: Add SDX65 SoC
  ARM: dts: qcom: sdx65: Add support for PCIe PHY
  ARM: dts: qcom: sdx65: Add support for PCIe EP
  ARM: dts: qcom: sdx65-mtp: Enable PCIe PHY
  ARM: dts: qcom: sdx65-mtp: Enable PCIe EP

 .../devicetree/bindings/mfd/qcom,tcsr.yaml         |  1 +
 .../devicetree/bindings/pci/qcom,pcie-ep.yaml      |  2 +
 arch/arm/boot/dts/qcom-sdx65-mtp.dts               | 50 ++++++++++--
 arch/arm/boot/dts/qcom-sdx65.dtsi                  | 92 ++++++++++++++++++++++
 4 files changed, 140 insertions(+), 5 deletions(-)

-- 
2.7.4

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