[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1678282532-16635-1-git-send-email-quic_rohiagar@quicinc.com>
Date: Wed, 8 Mar 2023 19:05:27 +0530
From: Rohit Agarwal <quic_rohiagar@...cinc.com>
To: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
lee@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, mani@...nel.org,
lpieralisi@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
manivannan.sadhasivam@...aro.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
Rohit Agarwal <quic_rohiagar@...cinc.com>
Subject: [PATCH v3 0/5] Add PCIe EP support for SDX65
Hi,
Changes in v3:
- Removing the applied patch.
- Addressing some of the compile time issues missed in v2.
Changes in v2:
- Addressing comments from Konrad and Dmitry.
- Rebased on top of 6.3-rc1.
This series adds the devicetree support for PCIe PHY and PCIe EP on SDX65.
The PCIe EP is enabled on SDX65 MTP board.
Thanks,
Rohit.
Rohit Agarwal (5):
dt-bindings: PCI: qcom: Add SDX65 SoC
ARM: dts: qcom: sdx65: Add support for PCIe PHY
ARM: dts: qcom: sdx65: Add support for PCIe EP
ARM: dts: qcom: sdx65-mtp: Enable PCIe PHY
ARM: dts: qcom: sdx65-mtp: Enable PCIe EP
.../devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 +
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 47 ++++++++++-
arch/arm/boot/dts/qcom-sdx65.dtsi | 90 ++++++++++++++++++++++
3 files changed, 136 insertions(+), 3 deletions(-)
--
2.7.4
Powered by blists - more mailing lists