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Message-ID: <3e3809e7-6603-3fd9-69b6-8ab114fff24b@linux.intel.com>
Date:   Thu, 9 Mar 2023 11:01:52 +0800
From:   Baolu Lu <baolu.lu@...ux.intel.com>
To:     iommu@...ts.linux.dev, dmaengine@...r.kernel.org
Cc:     baolu.lu@...ux.intel.com, Joerg Roedel <joro@...tes.org>,
        Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Kevin Tian <kevin.tian@...el.com>,
        Fenghua Yu <fenghua.yu@...el.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Vinod Koul <vkoul@...nel.org>,
        Jacob Pan <jacob.jun.pan@...ux.intel.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/5] Refactor code for non-PRI IOPF

On 3/9/23 10:56 AM, Lu Baolu wrote:
> The existing SVA and IOPF implementation assumes that devices report I/O
> page faults via PCI PRI. This is not always true as some emerging
> devices are designed to handle the I/O page faults by themselves without
> ever sending PCI page requests nor advertising PRI capability.
> 
> Refactor the SVA and IOPF code to allow SVA support with IOPF handled
> either by IOMMU (PCI PRI) or device driver (device-specific IOPF).
> 
> This series is based on v6.3-rc1 and also available at github:
> https://github.com/LuBaolu/intel-iommu/commits/intel-iommu-refactor-iopf-v2

This is iommu/vt-d specific. I should make it explicit in the
cover-letter title.

	iommu/vt-d: Refactor code for non-PRI IOPF

Sorry about it.

Best regards,
baolu

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