linux-kernel - Re: [PATCH v4 2/5] gpio: Add support for Intel LJCA USB GPIO driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 9 Mar 2023 18:30:53 +0100
From:   Oliver Neukum <oneukum@...e.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Oliver Neukum <oneukum@...e.com>
Cc:     Ye Xiang <xiang.ye@...el.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Arnd Bergmann <arnd@...db.de>,
        Matthias Kaehlcke <mka@...omium.org>,
        Lee Jones <lee@...nel.org>, Wolfram Sang <wsa@...nel.org>,
        Tyrone Ting <kfting@...oton.com>,
        Mark Brown <broonie@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>, linux-usb@...r.kernel.org,
        linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-spi@...r.kernel.org, linux-gpio@...r.kernel.org,
        srinivas.pandruvada@...el.com, heikki.krogerus@...ux.intel.com,
        sakari.ailus@...ux.intel.com, zhifeng.wang@...el.com,
        wentong.wu@...el.com, lixu.zhang@...el.com
Subject: Re: [PATCH v4 2/5] gpio: Add support for Intel LJCA USB GPIO driver



On 09.03.23 14:52, Andy Shevchenko wrote:
> On Thu, Mar 09, 2023 at 02:40:10PM +0100, Oliver Neukum wrote:
>> On 09.03.23 08:10, Ye Xiang wrote:

>>> +	u8 obuf[LJCA_GPIO_BUF_SIZE];
>>> +	u8 ibuf[LJCA_GPIO_BUF_SIZE];
>>
>> And here we have a violation of DMA coherency rules.
>> Basically you cannot embed buffers into other data structures
>> if they can be subject to DMA.
> 
> Huh?!
> 
> The problem here is alignment. But other than that I can't see the issue with
> embedding into structures the instances of which will be allocated on the heap.


Hi,

These constraints are documented in dma-api-howto, but perhaps this
is inconvenient to read through.
  
Let me explain for the input case. On certain CPUs DMA does not
update CPU caches. Hence when you want to read data generated by DMA
you must read from RAM. Hence you invalidate the cache line with dma_map_*
operations.
Those cache lines must stay invalidated. If you wish to guarantee that,
you cannot access a data structure that shares a cache line with a buffer,
until you are sure that DMA is finished.

On the affected architectures kmalloc() makes sure that no allocation straddles
cache lines.

	Regards
		Oliver