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Message-ID: <ec1fb4d134181a1b1859bcb884dcd494.sboyd@kernel.org>
Date: Thu, 09 Mar 2023 15:47:46 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
kernel test robot <lkp@...el.com>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, zhuyinbo <zhuyinbo@...ngson.cn>
Cc: oe-kbuild-all@...ts.linux.dev, Jianmin Lv <lvjianmin@...ngson.cn>,
Liu Peibao <liupeibao@...ngson.cn>, wanghongliang@...ngson.cn,
loongson-kernel@...ts.loongnix.cn
Subject: Re: [PATCH v13 2/2] clk: clk-loongson2: add clock controller driver support
Quoting zhuyinbo (2023-03-08 18:58:02)
>
> 在 2023/3/8 下午8:16, kernel test robot 写道:
> > Hi Yinbo,
> >
[...]
> >
> > drivers/clk/clk-loongson2.c: In function 'loongson2_calc_pll_rate':
> >>> drivers/clk/clk-loongson2.c:79:15: error: implicit declaration of function 'readq'; did you mean 'readl'? [-Werror=implicit-function-declaration]
> > 79 | val = readq(loongson2_pll_base + offset);
> > | ^~~~~
> > | readl
> > cc1: some warnings being treated as errors
>
> The CONFIG_64BIT not enabled in your config file, I will add a depend on
> "CONFIG_64BIT" in my clock driver to fix this compile error.
Do you need to use readq() here? Can you read two 32-bit registers with
readl() and put them together for a 64-bit number?
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