[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230309063514.398705-1-s-vadapalli@ti.com>
Date: Thu, 9 Mar 2023 12:05:11 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: <vkoul@...nel.org>, <kishon@...nel.org>, <rogerq@...nel.org>
CC: <linux-phy@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <srk@...com>,
<s-vadapalli@...com>
Subject: [PATCH v2 0/3] PHY-GMII-SEL: Add support for SGMII mode
Hello,
This series adds support to configure the CPSW MAC's PHY in SGMII mode.
Also, SGMII mode is enabled for TI's J7200 and J721E SoCs.
Changes from v1:
1. Add "break" statement within "case PHY_INTERFACE_MODE_SGMII".
2. Add newline before "default" case.
3. Update commit message of patch 1/3 to follow the existing convention.
v1:
https://lore.kernel.org/r/20230309062237.389444-1-s-vadapalli@ti.com/
Siddharth Vadapalli (3):
phy: ti: gmii-sel: Add support for SGMII mode
phy: ti: gmii-sel: Enable SGMII mode for J7200
phy: ti: gmii-sel: Enable SGMII mode for J721E
drivers/phy/ti/phy-gmii-sel.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
--
2.25.1
Powered by blists - more mailing lists