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Message-ID: <ZAq6VKmDbVT63cot@Asurada-Nvidia>
Date: Thu, 9 Mar 2023 21:04:20 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: Jean-Philippe Brucker <jean-philippe@...aro.org>
CC: <jgg@...dia.com>, <robin.murphy@....com>, <will@...nel.org>,
<eric.auger@...hat.com>, <kevin.tian@...el.com>,
<baolu.lu@...ux.intel.com>, <joro@...tes.org>,
<shameerali.kolothum.thodi@...wei.com>,
<linux-arm-kernel@...ts.infradead.org>, <iommu@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>, <yi.l.liu@...el.com>
Subject: Re: [PATCH v1 02/14] iommufd: Add nesting related data structures
for ARM SMMUv3
Hi Jeans,
Allow me to partially reply your email:
On Thu, Mar 09, 2023 at 01:42:17PM +0000, Jean-Philippe Brucker wrote:
> > +struct iommu_hwpt_arm_smmuv3 {
> > +#define IOMMU_SMMUV3_FLAG_S2 (1 << 0) /* if unset, stage-1 */
>
> I don't understand the purpose of this flag, since the structure only
> provides stage-1 configuration fields
I should have probably put more description for this flag. It
is used to allocate a stage-2 domain for a nested translation
setup. The default allocation for a kernel-managed domain will
allocate an S1 format of IO page table, at ARM_SMMU_DOMAIN_S1
stage. But a nested kernel-managed domain needs an S2 format,
at ARM_SMMU_DOMAIN_S2.
So the whole structure seems to only provide stage-1 info but
it's used for both stages. And a stage-2 allocation will only
need s2vmid if VMID flag is set (explaining below).
> > +#define IOMMU_SMMUV3_FLAG_VMID (1 << 1) /* vmid override */
>
> Doesn't this break isolation? The VMID space is global for the SMMU, so
> the guest could access cached mappings of another device
This flag isn't mature yet. I kept it from my internal RFC to
see if we can have a better solution. There are use cases on
certain platforms where the VMIDs across all devices in the
same VM need to be aligned.
Thanks
Nic
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