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Date:   Fri, 10 Mar 2023 09:42:47 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        kernel test robot <lkp@...el.com>, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, zhuyinbo <zhuyinbo@...ngson.cn>
Cc:     oe-kbuild-all@...ts.linux.dev, Jianmin Lv <lvjianmin@...ngson.cn>,
        Liu Peibao <liupeibao@...ngson.cn>, wanghongliang@...ngson.cn,
        loongson-kernel@...ts.loongnix.cn
Subject: Re: [PATCH v13 2/2] clk: clk-loongson2: add clock controller driver
 support

On 10/03/2023 00:47, Stephen Boyd wrote:
> Quoting zhuyinbo (2023-03-08 18:58:02)
>>
>> 在 2023/3/8 下午8:16, kernel test robot 写道:
>>> Hi Yinbo,
>>>
> [...]
>>>
>>>     drivers/clk/clk-loongson2.c: In function 'loongson2_calc_pll_rate':
>>>>> drivers/clk/clk-loongson2.c:79:15: error: implicit declaration of function 'readq'; did you mean 'readl'? [-Werror=implicit-function-declaration]
>>>        79 |         val = readq(loongson2_pll_base + offset);
>>>           |               ^~~~~
>>>           |               readl
>>>     cc1: some warnings being treated as errors
>>
>> The CONFIG_64BIT not enabled in your config file, I will add a depend on 
>> "CONFIG_64BIT" in my clock driver to fix this compile error.
> 
> Do you need to use readq() here? Can you read two 32-bit registers with
> readl() and put them together for a 64-bit number?

If the platform supports 64-bit reads and these are actually one
register, then readq makes sense - code is more readable, smaller, more
efficient.

Best regards,
Krzysztof

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