lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 10 Mar 2023 10:21:39 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        andersson@...nel.org, lpieralisi@...nel.org, kw@...ux.com,
        krzysztof.kozlowski+dt@...aro.org, robh@...nel.org
Cc:     konrad.dybcio@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, quic_srichara@...cinc.com
Subject: Re: [PATCH v3 14/19] dt-bindings: PCI: qcom: Add "mhi" register
 region to supported SoCs

On 10/03/2023 05:08, Manivannan Sadhasivam wrote:
> "mhi" register region contains the MHI registers that could be used by
> the PCIe controller drivers to get debug information like PCIe link
> transition counts on newer SoCs.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ