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Message-ID: <62ed2988-2347-9fd9-82f9-6dcc9ae75808@collabora.com>
Date:   Fri, 10 Mar 2023 10:49:30 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Alexandre Mergnat <amergnat@...libre.com>,
        Zhiyong Tao <zhiyong.tao@...iatek.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bernhard Rosenkränzer <bero@...libre.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Chaotian Jing <chaotian.jing@...iatek.com>,
        Rob Herring <robh+dt@...nel.org>,
        Wenbin Mei <wenbin.mei@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>
Cc:     linux-mmc@...r.kernel.org, Alexandre Bailon <abailon@...libre.com>,
        devicetree@...r.kernel.org,
        Amjad Ouled-Ameur <aouledameur@...libre.com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-watchdog@...r.kernel.org,
        linux-mediatek@...ts.infradead.org,
        Fabien Parent <fparent@...libre.com>
Subject: Re: [PATCH v2 03/18] dt-bindings: pinctrl: mediatek,mt8365-pinctrl:
 add drive strength property

Il 10/03/23 10:46, AngeloGioacchino Del Regno ha scritto:
> Il 10/03/23 09:32, Krzysztof Kozlowski ha scritto:
>> On 07/03/2023 14:17, Alexandre Mergnat wrote:
>>> This SoC is able to drive the following output current:
>>> - 2 mA
>>> - 4 mA
>>> - 6 mA
>>> - 8 mA
>>> - 10 mA
>>> - 12 mA
>>> - 14 mA
>>> - 16 mA
>>>
>>> Then drive-strength property is set with enum to reflect its HW capability.
>>>
>>> Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>
>>> ---
>>>   Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml | 3 +++
>>>   1 file changed, 3 insertions(+)
>>>
>>> diff --git 
>>> a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml 
>>> b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
>>> index 4b96884a1afc..101871ec6693 100644
>>> --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
>>> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
>>> @@ -79,6 +79,9 @@ patternProperties:
>>>             bias-pull-down: true
>>> +          drive-strength:
>>> +            enum: [2, 4, 6, 8, 10, 12, 14, 16]
>>
>> Isn't this conflicting with mediatek,drive-strength-adv? Your commit msg
>> suggests you add a missing property, but I would say nothing was missing
>> here.
>>
>> You need review from (pinctrl) Mediatek maintainers how the bindings for
>> all Mediateks are organized.
> 
> Hello Krzysztof,
> 
> mediatek,drive-strength-adv *shall not exist*, that was an unnecessary property
> that leaked upstream from downstream kernels and there's no reason to use it.
> 
> Upstream, we have drive-strength-microamp and mediatek,rsel-resistance-in-si-unit.
> 
> Since mediatek,mt8365-pinctrl.yaml got picked with that property already, I have
> nothing to complain about this specific commit... drive-strength does not conflict
> with the mediatek,drive-strength-adv property, as the "adv" is for microamp
> adjustments.
> 
> You can pick it, it's fine.
> 
> Anyway, Alexandre: can you please perform a cleanup to the MT8365 pinctrl binding?
> The cleanup means you're setting mediatek,drive-strength-adv as deprecated and
> adding the right properties (...and possibly changing the devicetrees to use it).
> 
> For more information, you can look at commit history for the (unfortunately, named
> incorrectly) MT8195 pinctrl documentation: bindings/pinctrl/pinctrl-mt8195.yaml
> where we performed the same cleanup that I'm asking you to do, except we didn't
> have to set any property as deprecated because there was *no devicetree upstream*
> that was actually using that property (hence not an ABI breakage).
> 
> Cheers!
> Angelo

Sorry for the double email. I forgot to give my:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

Whoops!
Cheers again  :-)

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