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Message-ID: <6b6b5dc2-43ab-5672-099f-505ab4543438@linaro.org>
Date:   Fri, 10 Mar 2023 15:51:21 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sam Protsenko <semen.protsenko@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Sylwester Nawrocki <s.nawrocki@...sung.com>
Cc:     Marek Szyprowski <m.szyprowski@...sung.com>,
        Tomasz Figa <tomasz.figa@...il.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Chanho Park <chanho61.park@...sung.com>,
        David Virag <virag.david003@...il.com>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/7] dt-bindings: clock: exynos850: Add tzpc property

On 09/03/2023 00:38, Sam Protsenko wrote:
> Exynos850 requires extra TZPC handling to keep CMU registers non-secure
> (accessible from the kernel) after PM resume. It's done using a specific
> SMC call to the EL3 monitor.
> 
> Describe "samsung,tzpc" property for Exynos850 clock controller which
> allows one to specify the SMC call address for PD capable CMUs.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
>  .../bindings/clock/samsung,exynos850-clock.yaml        | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> index cc1e9173b272..5098dce5caf6 100644
> --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> @@ -60,6 +60,16 @@ properties:
>    reg:
>      maxItems: 1
>  
> +  samsung,tzpc:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      The register address in corresponding Trust Zone Protection Control block
> +      for setting the CMU registers access to non-secure. If provided, it'll be
> +      used for issuing SMC calls to EL3 monitor during CMU's PM suspend and
> +      resume operations, ensuring CMU registers are unprotected after waking up.

Do not store register addresses of MMIO in some fields. If this is part
of clock MMIO, then it could be address space in reg. If it is not, you
cannot store someone's else address space here. If this is someone's
else address space, then you either need syscon or phandle to dedicated
device (something like qcom,scm or other secure monitor channel).

> +
> +      This property is optional.

Drop, It's already optional if not required.

Best regards,
Krzysztof

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