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Message-ID: <DU0PR04MB9417D33088377F41D33EF33088B89@DU0PR04MB9417.eurprd04.prod.outlook.com>
Date: Sun, 12 Mar 2023 12:57:51 +0000
From: Peng Fan <peng.fan@....com>
To: Oleksij Rempel <o.rempel@...gutronix.de>,
Abel Vesa <abelvesa@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Fabio Estevam <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH v1] clk: imx6ul: fix "failed to get parent" error
> Subject: [PATCH v1] clk: imx6ul: fix "failed to get parent" error
>
> On some configuration we may get following error:
> [ 0.000000] imx:clk-gpr-mux: failed to get parent (-EINVAL)
>
> This happens if selector is configured to not supported value. To avoid this
> warnings add dummy parents for not supported values.
>
> Fixes: 4e197ee880c2 ("clk: imx6ul: add ethernet refclock mux support")
> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
[Peng Fan]
Reviewed-by: Peng Fan <peng.fan@....com>
> ---
> drivers/clk/imx/clk-imx6ul.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c index
> 2836adb817b7..e3696a88b5a3 100644
> --- a/drivers/clk/imx/clk-imx6ul.c
> +++ b/drivers/clk/imx/clk-imx6ul.c
> @@ -95,14 +95,16 @@ static const struct clk_div_table video_div_table[] = {
> { }
> };
>
> -static const char * enet1_ref_sels[] = { "enet1_ref_125m",
> "enet1_ref_pad", };
> +static const char * enet1_ref_sels[] = { "enet1_ref_125m",
> +"enet1_ref_pad", "dummy", "dummy"};
> static const u32 enet1_ref_sels_table[] =
> { IMX6UL_GPR1_ENET1_TX_CLK_DIR,
> - IMX6UL_GPR1_ENET1_CLK_SEL };
> + IMX6UL_GPR1_ENET1_CLK_SEL, 0,
> +
> IMX6UL_GPR1_ENET1_TX_CLK_DIR | IMX6UL_GPR1_ENET1_CLK_SEL };
> static const u32 enet1_ref_sels_table_mask =
> IMX6UL_GPR1_ENET1_TX_CLK_DIR |
> IMX6UL_GPR1_ENET1_CLK_SEL;
> -static const char * enet2_ref_sels[] = { "enet2_ref_125m",
> "enet2_ref_pad", };
> +static const char * enet2_ref_sels[] = { "enet2_ref_125m",
> +"enet2_ref_pad", "dummy", "dummy"};
> static const u32 enet2_ref_sels_table[] =
> { IMX6UL_GPR1_ENET2_TX_CLK_DIR,
> - IMX6UL_GPR1_ENET2_CLK_SEL };
> + IMX6UL_GPR1_ENET2_CLK_SEL, 0,
> +
> IMX6UL_GPR1_ENET2_TX_CLK_DIR | IMX6UL_GPR1_ENET2_CLK_SEL };
> static const u32 enet2_ref_sels_table_mask =
> IMX6UL_GPR1_ENET2_TX_CLK_DIR |
> IMX6UL_GPR1_ENET2_CLK_SEL;
>
> --
> 2.30.2
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