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Message-ID: <0d46a128-bd65-90cf-6c35-00f5364b7ae0@linaro.org>
Date:   Sun, 12 Mar 2023 18:16:52 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Sergey Lisov <sleirsgoevy@...il.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Jaehoon Chung <jh80.chung@...sung.com>
Cc:     linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 3/3] mmc: dw_mmc: add an option to force 32-bit access
 to 64-bit FIFO

On 12/03/2023 17:59, Sergey Lisov wrote:
> Some Samsung Exynos boards using the arm64 architecture have DW MMC
> controllers configured for a 32-bit data bus but a 64-bit FIFO. On these
> systems the 64-bit FIFO registers must be accessed in two 32-bit halves.
> ---
>  drivers/mmc/host/dw_mmc-exynos.c |  41 ++++++++++-
>  drivers/mmc/host/dw_mmc.c        | 122 ++++++++++++++++++++++++++++++-
>  drivers/mmc/host/dw_mmc.h        |   2 +
>  3 files changed, 162 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
> index 9f20ac524..768774f22 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.c
> +++ b/drivers/mmc/host/dw_mmc-exynos.c
> @@ -28,6 +28,8 @@ enum dw_mci_exynos_type {
>  	DW_MCI_TYPE_EXYNOS5420_SMU,
>  	DW_MCI_TYPE_EXYNOS7,
>  	DW_MCI_TYPE_EXYNOS7_SMU,
> +	DW_MCI_TYPE_EXYNOS78XX,
> +	DW_MCI_TYPE_EXYNOS78XX_SMU,
>  	DW_MCI_TYPE_ARTPEC8,
>  };
>  
> @@ -70,6 +72,12 @@ static struct dw_mci_exynos_compatible {
>  	}, {
>  		.compatible	= "samsung,exynos7-dw-mshc-smu",
>  		.ctrl_type	= DW_MCI_TYPE_EXYNOS7_SMU,
> +	}, {
> +		.compatible	= "samsung,exynos78xx-dw-mshc",
> +		.ctrl_type	= DW_MCI_TYPE_EXYNOS78XX,
> +	}, {
> +		.compatible	= "samsung,exynos78xx-dw-mshc-smu",
> +		.ctrl_type	= DW_MCI_TYPE_EXYNOS78XX_SMU,
>  	}, {
>  		.compatible	= "axis,artpec8-dw-mshc",
>  		.ctrl_type	= DW_MCI_TYPE_ARTPEC8,
> @@ -86,6 +94,8 @@ static inline u8 dw_mci_exynos_get_ciu_div(struct dw_mci *host)
>  		return EXYNOS4210_FIXED_CIU_CLK_DIV;
>  	else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
>  			priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU ||
> +			priv->ctrl_type == DW_MCI_TYPE_EXYNOS78XX ||
> +			priv->ctrl_type == DW_MCI_TYPE_EXYNOS78XX_SMU ||
>  			priv->ctrl_type == DW_MCI_TYPE_ARTPEC8)

This is getting look like a spaghetti code. I think this needs
quirks/flags, except of types. Or this ifs all over should be made a bit
smarter as all of these are pretty close to compatible.


Best regards,
Krzysztof

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