linux-kernel - [PATCH RFC v3 07/16] RISC-V: add helper function to read the vector VLEN

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Message-Id: <20230313191302.580787-8-heiko.stuebner@vrull.eu>
Date:   Mon, 13 Mar 2023 20:12:53 +0100
From:   Heiko Stuebner <heiko@...ech.de>
To:     palmer@...osinc.com
Cc:     greentime.hu@...ive.com, conor@...nel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        christoph.muellner@...ll.eu, heiko@...ech.de
Subject: [PATCH RFC v3 07/16] RISC-V: add helper function to read the vector VLEN

From: Heiko Stuebner <heiko.stuebner@...ll.eu>

VLEN describes the length of each vector register and some instructions
need specific minimal VLENs to work correctly.

The vector code already includes a variable riscv_vsize that contains the
value of "32 vector registers with vlenb length" that gets filled during
boot. vlenb is the value contained in the CSR_VLENB register and
the value represents "VLEN / 8".

So add riscv_vector_vlen() to return the actual VLEN value for in-kernel
users when they need to check the available VLEN.

Signed-off-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
---
 arch/riscv/include/asm/vector.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h
index 202df9ea28d7..e466e7787d25 100644
--- a/arch/riscv/include/asm/vector.h
+++ b/arch/riscv/include/asm/vector.h
@@ -178,4 +178,15 @@ static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; }
 
 #endif /* CONFIG_RISCV_ISA_V */
 
+/*
+ * Return the implementation's vlen value.
+ *
+ * riscv_vsize contains the value of "32 vector registers with vlenb length"
+ * so rebuild the vlen value in bits from it.
+ */
+static inline int riscv_vector_vlen(void)
+{
+	return riscv_v_vsize / 32 * 8;
+}
+
 #endif /* ! __ASM_RISCV_VECTOR_H */
-- 
2.39.0