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Message-ID: <35700295-8f30-08a7-2f83-edd3d92482fd@linaro.org>
Date:   Tue, 14 Mar 2023 02:07:14 +0530
From:   Bhupesh Sharma <bhupesh.sharma@...aro.org>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, agross@...nel.org,
        andersson@...nel.org, linux-kernel@...r.kernel.org,
        bhupesh.linux@...il.com, robh+dt@...nel.org,
        devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org
Subject: Re: [PATCH] arm64: dts: qcom: sm6115: Add CPU idle-states

On 3/3/23 6:33 AM, Konrad Dybcio wrote:
> 
> 
> On 18.01.2023 21:48, Bhupesh Sharma wrote:
>> On Thu, 19 Jan 2023 at 02:10, Konrad Dybcio <konrad.dybcio@...aro.org> wrote:
>>>
>>>
>>>
>>> On 18.01.2023 21:34, Bhupesh Sharma wrote:
>>>> Add CPU idle-state nodes and power-domains in Qualcomm sm6115 SoC dtsi.
>>>>
>>>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
>>>> ---
> [...]
> 
>>>> +
>>>> +             domain-idle-states {
>>>> +                     CLUSTER_SLEEP_0: cluster-sleep-0 {
>>>> +                             compatible = "domain-idle-state";
>>>> +                             idle-state-name = "cluster-power-collapse";
>>>> +                             arm,psci-suspend-param = <0x41000043>;
>>>> +                             entry-latency-us = <800>;
>>>> +                             exit-latency-us = <2118>;
>>>> +                             min-residency-us = <7376>;
>>> These values vary per cluster, see qcom,pm-cluster-level@2 in the
>>> file linked above.. We should either split that, or at least take
>>> max() of each value between the two nodes to make sure the sleep
>>> state is exited properly on both types of cores.
>>
>> Ack to both the above observations. Will send a fixed v2 shortly.
> In doing so, please also add support for D3G cluster sleep states
> as well, it sounds beneficial to have a middleground between a total
> power collapse and a simple wfi.
> 

Right. I am adding D3G in v2.
I will share the same shortly.

Regards,
Bhupesh

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