linux-kernel - Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag

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Date:   Tue, 14 Mar 2023 14:14:27 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Lucas Tanure <lucas.tanure@...labora.com>
Cc:     Robin Murphy <robin.murphy@....com>,
        Peter Geis <pgwipeout@...il.com>,
        Vinod Koul <vkoul@...nel.org>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Heiko Stuebner <heiko@...ech.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczynski <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>, Qu Wenruo <wqu@...e.com>,
        Piotr Oniszczuk <piotr.oniszczuk@...il.com>,
        Kever Yang <kever.yang@...k-chips.com>,
        linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag

On Tue, 14 Mar 2023 13:25:28 +0000,
Lucas Tanure <lucas.tanure@...labora.com> wrote:
> 
> On 10-03-2023 12:04, Robin Murphy wrote:
> > On 2023-03-10 11:41, Peter Geis wrote:
> >> On Fri, Mar 10, 2023 at 3:05 AM Lucas Tanure
> >> <lucas.tanure@...labora.com> wrote:
> >>> 
> >>> The GIC600 integration in RK356x, used in rk3588, doesn't support
> >>> any of the shareability or cacheability attributes, and requires
> >>> both values to be set to 0b00 for all the ITS and Redistributor
> >>> tables.
> >>> 
> >>> This is loosely based on prior work from XiaoDong Huang and
> >>> Peter Geis fixing this issue specifically for Rockchip 356x.
> >> 
> >> Good Morning,
> >> 
> >> Since the gic is using dma, would it be reasonable to have all memory
> >> allocations be requested with the GFP_DMA flag? Otherwise this doesn't
> >> fully solve the problem for rk356x, where only the lower 4GB range is
> >> DMA capable, but this tends to get allocated in the upper 4GB on 8GB
> >> boards.
> > 
> > Not really, because there's no fixed definition of what GFP_DMA
> > actually means, and it may mean nothing (same for GFP_DMA32, which
> > may or may not be meaningful depending on kernel config and platform
> > topology). Drivers should really use the DMA API allocation
> > functions if they care about what they get, which comes back round
> > to the notion from years ago of converting the ITS driver to a
> > regular platform driver, so it can benefit from regular DT concepts
> > like "dma-ranges" automatically.
> > 
> > Thanks,
> > Robin.
> > 
> I am looking how to do that conversion to platform driver.
> But about the communication between irq-gic-v3-its and irq-gic-v3.
> Should irq-gic-v3-its be a MFD child of irq-gic-v3?

MFD? I'd rather suggest an VME bus driver. ;-)

Seriously, this is an interrupt controller. Nothing else. It should
probe the parent irqdomain, and stack onto that. No parent? Probe
deferral.

> Or use the component bind/unbind framework?

I don't understand what you mean here.

	M.

-- 
Without deviation from the norm, progress is not possible.