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Message-ID: <881ce5739e4237ea9a31029acaa535422d41fa5f.1678814935.git.philipp.g.hortmann@gmail.com>
Date: Tue, 14 Mar 2023 19:43:03 +0100
From: Philipp Hortmann <philipp.g.hortmann@...il.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-staging@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: [PATCH 02/12] staging: rtl8192e: Join constants MACPHY_ArrayLength
with ..LengthPciE
Join constants MACPHY_ArrayLength with MACPHY_ArrayLengthPciE to
RTL8192E_MACPHY_ARR_LEN to improve readability.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@...il.com>
---
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 2 +-
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h | 1 -
drivers/staging/rtl8192e/rtl8192e/table.h | 4 ++--
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index 54596982bc76..29918a529f77 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -291,7 +291,7 @@ void rtl92e_config_mac(struct net_device *dev)
pdwArray = Rtl819XMACPHY_Array_PG;
} else {
- dwArrayLen = MACPHY_ArrayLength;
+ dwArrayLen = RTL8192E_MACPHY_ARR_LEN;
pdwArray = Rtl819XMACPHY_Array;
}
for (i = 0; i < dwArrayLen; i += 3) {
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
index d984380bcca3..611756517ce6 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
@@ -9,7 +9,6 @@
#define MAX_DOZE_WAITING_TIMES_9x 64
-#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
#define RadioA_ArrayLength RadioA_ArrayLengthPciE
#define RadioB_ArrayLength RadioB_ArrayLengthPciE
#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
diff --git a/drivers/staging/rtl8192e/rtl8192e/table.h b/drivers/staging/rtl8192e/rtl8192e/table.h
index 439847b1f52b..cb424c8fbee0 100644
--- a/drivers/staging/rtl8192e/rtl8192e/table.h
+++ b/drivers/staging/rtl8192e/rtl8192e/table.h
@@ -17,8 +17,8 @@ extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE];
#define RadioB_ArrayLengthPciE 78
extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE];
-#define MACPHY_ArrayLengthPciE 18
-extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE];
+#define RTL8192E_MACPHY_ARR_LEN 18
+extern u32 Rtl8192PciEMACPHY_Array[RTL8192E_MACPHY_ARR_LEN];
#define MACPHY_Array_PGLengthPciE 30
extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
#define RTL8192E_AGCTAB_ARR_LEN 384
--
2.39.2
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