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Message-Id: <20230314092311.8924-3-jim.t90615@gmail.com>
Date: Tue, 14 Mar 2023 17:23:10 +0800
From: Jim Liu <jim.t90615@...il.com>
To: JJLIU0@...oton.com, KWLIU@...oton.com, linus.walleij@...aro.org,
brgl@...ev.pl, jim.t90615@...il.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: [PATCH v5 2/3] arm: dts: nuvoton: npcm: Add sgpio feature
Add the SGPIO controller to the NPCM7xx devicetree
Signed-off-by: Jim Liu <jim.t90615@...il.com>
---
Changes for v5:
- remove npcm8xx node
Changes for v4:
- add npcm8xx gpio node
Changes for v3:
- modify node name
- modify in/out property name
Changes for v2:
- modify dts node
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index c7b5ef15b716..7f53774a01ec 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -330,6 +330,36 @@
status = "disabled";
};
+ gpio8: gpio@...000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ bus-frequency = <8000000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox1_pins>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
+ gpio9: gpio@...000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x102000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ bus-frequency = <8000000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox2_pins>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
pwm_fan: pwm-fan-controller@...000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1
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