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Message-ID: <eac18156-f5af-0364-151f-46c58e0ed426@quicinc.com>
Date:   Tue, 14 Mar 2023 15:00:28 +0530
From:   Shazad Hussain <quic_shazhuss@...cinc.com>
To:     Bartosz Golaszewski <brgl@...ev.pl>
CC:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Manivannan Sadhasivam <mani@...nel.org>,
        Jassi Brar <jassisinghbrar@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: add initial support for qcom
 sa8775p-ride



On 3/14/2023 1:49 PM, Bartosz Golaszewski wrote:
> On Tue, Mar 14, 2023 at 7:26 AM Shazad Hussain
> <quic_shazhuss@...cinc.com> wrote:
>>
>>
>>
>> On 2/14/2023 2:57 PM, Bartosz Golaszewski wrote:
>>> From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
>>>
>>> This adds basic support for the Qualcomm sa8775p platform and the
>>> reference board: sa8775p-ride. The dt files describe the basics of the
>>> SoC and enable booting to shell.
>>>
>>> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>>> ---
>>>    arch/arm64/boot/dts/qcom/Makefile         |   1 +
>>>    arch/arm64/boot/dts/qcom/sa8775p-ride.dts |  47 ++
>>>    arch/arm64/boot/dts/qcom/sa8775p.dtsi     | 805 ++++++++++++++++++++++
>>>    3 files changed, 853 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-ride.dts
>>>    create mode 100644 arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>> index 31aa54f0428c..b63cd1861e68 100644
>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>> @@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_QCOM)     += qru1000-idp.dtb
>>>    dtb-$(CONFIG_ARCH_QCOM)     += sa8155p-adp.dtb
>>>    dtb-$(CONFIG_ARCH_QCOM)     += sa8295p-adp.dtb
>>>    dtb-$(CONFIG_ARCH_QCOM)     += sa8540p-ride.dtb
>>> +dtb-$(CONFIG_ARCH_QCOM)      += sa8775p-ride.dtb
>>>    dtb-$(CONFIG_ARCH_QCOM)     += sc7180-idp.dtb
>>>    dtb-$(CONFIG_ARCH_QCOM)     += sc7180-trogdor-coachz-r1.dtb
>>>    dtb-$(CONFIG_ARCH_QCOM)     += sc7180-trogdor-coachz-r1-lte.dtb
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
>>> new file mode 100644
>>> index 000000000000..3adf7349f4e5
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
>>> @@ -0,0 +1,47 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2023, Linaro Limited
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "sa8775p.dtsi"
>>> +
>>> +/ {
>>> +     model = "Qualcomm SA8775P Ride";
>>> +     compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
>>> +
>>> +     aliases {
>>> +             serial0 = &uart10;
>>> +     };
>>> +
>>> +     chosen {
>>> +             stdout-path = "serial0:115200n8";
>>> +     };
>>> +};
>>> +
>>> +&qupv3_id_1 {
>>> +     status = "okay";
>>> +};
>>> +
>>> +&sleep_clk {
>>> +     clock-frequency = <32764>;
>>> +};
>>> +
>>> +&tlmm {
>>> +     qup_uart10_default: qup-uart10-state {
>>> +             pins = "gpio46", "gpio47";
>>> +             function = "qup1_se3";
>>> +     };
>>> +};
>>
>> Can we keep &tlmm at the end ? As this would be expanding.
>>
> 
> The overridden nodes are ordered alphabetically. Why would expanding
> them be a reason to put it at the end?
> 
> Bart
> 

I agree that it follows alphabetically, but typically the
pin configuration node go last after /* PINCTRL */ delimiter
as this particular section tends to become long.

-Shazad

> [...]

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