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Message-Id: <167892332564.4030021.6913004577416128878.b4-ty@kernel.org>
Date:   Wed, 15 Mar 2023 16:34:39 -0700
From:   Bjorn Andersson <andersson@...nel.org>
To:     Johan Hovold <johan+linaro@...nel.org>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        vkoul@...nel.org, Rob Herring <robh@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Abel Vesa <abel.vesa@...aro.org>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Manivannan Sadhasivam <mani@...nel.org>,
        Andy Gross <agross@...nel.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        devicetree@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-pci@...r.kernel.org
Subject: Re: (subset) [PATCH v9 00/11] sm8550: Add PCIe HC and PHY support

On Wed, 8 Feb 2023 20:00:09 +0200, Abel Vesa wrote:
> For changelogs please look at each patch individually.
> 
> Abel Vesa (11):
>   dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550
>   phy: qcom-qmp: pcs: Add v6 register offsets
>   phy: qcom-qmp: pcs: Add v6.20 register offsets
>   phy: qcom-qmp: pcs-pcie: Add v6 register offsets
>   phy: qcom-qmp: pcs-pcie: Add v6.20 register offsets
>   phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets
>   phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets
>   phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs
>   dt-bindings: PCI: qcom: Add SM8550 compatible
>   PCI: qcom: Add SM8550 PCIe support
>   arm64: dts: qcom: sm8550: Fix PCIe PHYs and controllers nodes
> 
> [...]

Applied, thanks!

[11/11] arm64: dts: qcom: sm8550: Fix PCIe PHYs and controllers nodes
        commit: 32734bbd1802efbd60ea4f0c3c1d5500bd0b20fe

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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