linux-kernel - [RESEND v6 2/2] riscv: dts: starfive: Add syscon node

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Message-ID: <20230315055813.94740-3-william.qiu@starfivetech.com>
Date:   Wed, 15 Mar 2023 13:58:13 +0800
From:   William Qiu <william.qiu@...rfivetech.com>
To:     <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
CC:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor@...nel.org>,
        "Emil Renner Berthing" <kernel@...il.dk>,
        William Qiu <william.qiu@...rfivetech.com>
Subject: [RESEND v6 2/2] riscv: dts: starfive: Add syscon node

Add stg_syscon/sys_syscon/aon_syscon node for JH7110 Soc.

Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index d484ecdf93f7..49dd62276b0d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -362,6 +362,11 @@ i2c2: i2c@...50000 {
 			status = "disabled";
 		};

+		stg_syscon: syscon@...40000 {
+			compatible = "starfive,jh7110-stg-syscon", "syscon";
+			reg = <0x0 0x10240000 0x0 0x1000>;
+		};
+
 		uart3: serial@...00000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x0 0x12000000 0x0 0x10000>;
@@ -466,6 +471,11 @@ syscrg: clock-controller@...20000 {
 			#reset-cells = <1>;
 		};

+		sys_syscon: syscon@...30000 {
+			compatible = "starfive,jh7110-sys-syscon", "syscon";
+			reg = <0x0 0x13030000 0x0 0x1000>;
+		};
+
 		sysgpio: pinctrl@...40000 {
 			compatible = "starfive,jh7110-sys-pinctrl";
 			reg = <0x0 0x13040000 0x0 0x10000>;
@@ -495,6 +505,11 @@ aoncrg: clock-controller@...00000 {
 			#reset-cells = <1>;
 		};

+		aon_syscon: syscon@...10000 {
+			compatible = "starfive,jh7110-aon-syscon", "syscon";
+			reg = <0x0 0x17010000 0x0 0x1000>;
+		};
+
 		aongpio: pinctrl@...20000 {
 			compatible = "starfive,jh7110-aon-pinctrl";
 			reg = <0x0 0x17020000 0x0 0x10000>;
--
2.34.1