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Message-ID: <6f78ecfb-99c8-eee3-cad0-69bbd88a107c@intel.com>
Date: Thu, 16 Mar 2023 07:59:56 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: silviazhao <silviazhao-oc@...oxin.com>, peterz@...radead.org,
mingo@...hat.com, acme@...nel.org, mark.rutland@....com,
alexander.shishkin@...ux.intel.com, jolsa@...nel.org,
namhyung@...nel.org, irogers@...gle.com, adrian.hunter@...el.com,
tglx@...utronix.de, bp@...en8.de, dave.hansen@...ux.intel.com,
x86@...nel.org, hpa@...or.com, linux-perf-users@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: cobechen@...oxin.com, louisqi@...oxin.com, silviazhao@...oxin.com,
cooperyan@...oxin.com
Subject: Re: [PATCH] perf/x86/zhaoxin: Add Yongfeng support
On 3/15/23 19:16, silviazhao wrote:
> + case 0x5b:
> + zx_pmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
> + X86_CONFIG(.event = 0x02, .umask = 0x01, .inv = 0x01,
> + .cmask = 0x01);
On the Intel side of x86/ land, we used to have these open-coded
model/family numbers scattered about. But, a few years ago, we started
populating arch/x86/include/asm/intel-family.h and using those instead.
I think it's been pretty successful. It's a lot easier to grep for
INTEL_FAM6_NEHALEM_EX than for 0x2E.
Is there a chance we could start doing the same for other CPU vendors?
Perhaps start with:
#define ZHAOXIN_FAMILY_YONGFENG 0x5B
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