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Message-Id: <167893686410.303819.5208981481540188437.b4-ty@kernel.org>
Date: Wed, 15 Mar 2023 20:20:56 -0700
From: Bjorn Andersson <andersson@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
lpieralisi@...nel.org, vkoul@...nel.org, kw@...ux.com,
krzysztof.kozlowski+dt@...aro.org, robh@...nel.org
Cc: linux-kernel@...r.kernel.org, kishon@...nel.org,
konrad.dybcio@...aro.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, bhelgaas@...gle.com,
linux-phy@...ts.infradead.org, linux-pci@...r.kernel.org
Subject: Re: (subset) [PATCH v3 00/13] Add PCIe RC support to Qcom SDX55 SoC
On Wed, 8 Mar 2023 13:54:11 +0530, Manivannan Sadhasivam wrote:
> This series adds PCIe RC support to the Qcom SDX55 SoC. The PCIe controller
> in SDX55 can act as both Root Complex and Endpoint but only one mode at a
> time i.e., the mode cannot be switched during runtime.
>
> This series has been tested on Thundercomm T55 board having QCA6390 WLAN
> chipset connected to the PCIe controller. For powering up the WLAN chipset,
> an out-of-tree patch has been used since we do not have a proper driver in
> mainline to handle the power supplies.
>
> [...]
Applied, thanks!
[05/13] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node
commit: 3b76b736cd9933ff88764ffec01cbd859c1475e7
[06/13] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane}
commit: c9f30e3dd92ba779c9cb8bb694ed7a8e2c9f0bb3
[07/13] ARM: dts: qcom: sdx55: Add support for PCIe RC controller
commit: 2b20437e67a4b74b990d19d3dbf55388e941f30f
[08/13] ARM: dts: qcom: sdx55: List the property values vertically
commit: f9364a7ced5e6e36904c359cafe23cbf03645884
[09/13] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support
commit: 046392390884c9dead1d3703fa60dff97f22857a
[10/13] ARM: dts: qcom: sdx55-t55: Move "status" property down
commit: 43743bfa36daed8f31860ad889a1413f239bb2f2
Best regards,
--
Bjorn Andersson <andersson@...nel.org>
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