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Message-ID: <20230317060917.15175-7-allen-kh.cheng@mediatek.com>
Date: Fri, 17 Mar 2023 14:09:16 +0800
From: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephen Boyd <sboyd@...nel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
CC: <Project_Global_Chrome_Upstream_Group@...iatek.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, <hsinyi@...omium.org>,
Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Subject: [PATCH v4 6/7] arm64: dts: mediatek: mt8186: Add GCE node
Add the Global Command Engine (GCE) node for MT8186 SoC
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index f198fd8abc1d..b9d5af26771e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -5,6 +5,7 @@
*/
/dts-v1/;
#include <dt-bindings/clock/mt8186-clk.h>
+#include <dt-bindings/gce/mt8186-gce.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/memory/mt8186-memory-port.h>
@@ -625,6 +626,15 @@
clocks = <&clk13m>;
};
+ gce: mailbox@...2c000 {
+ compatible = "mediatek,mt8186-gce";
+ reg = <0 0X1022c000 0 0x4000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ clock-names = "gce";
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ };
+
scp: scp@...00000 {
compatible = "mediatek,mt8186-scp";
reg = <0 0x10500000 0 0x40000>,
--
2.18.0
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