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Message-ID: <87edpng7l9.fsf@henneberg-systemdesign.com>
Date: Fri, 17 Mar 2023 08:22:57 +0100
From: Jochen Henneberg <jh@...neberg-systemdesign.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: netdev@...r.kernel.org,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
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Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Wong Vee Khee <veekhee@...le.com>,
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Revanth Kumar Uppala <ruppala@...dia.com>,
Andrey Konovalov <andrey.konovalov@...aro.org>,
Tan Tee Min <tee.min.tan@...ux.intel.com>,
Voon Weifeng <weifeng.voon@...el.com>,
Mohammad Athari Bin Ismail <mohammad.athari.ismail@...el.com>,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH net V2] net: stmmac: Fix for mismatched host/device DMA
address width
"Russell King (Oracle)" <linux@...linux.org.uk> writes:
> On Thu, Mar 16, 2023 at 02:15:03PM +0100, Jochen Henneberg wrote:
>> Currently DMA address width is either read from a RO device register
>> or force set from the platform data. This breaks DMA when the host DMA
>> address width is <=32it but the device is >32bit.
>>
>> Right now the driver may decide to use a 2nd DMA descriptor for
>> another buffer (happens in case of TSO xmit) assuming that 32bit
>> addressing is used due to platform configuration but the device will
>> still use both descriptor addresses as one address.
>>
>> This can be observed with the Intel EHL platform driver that sets
>> 32bit for addr64 but the MAC reports 40bit. The TX queue gets stuck in
>> case of TCP with iptables NAT configuration on TSO packets.
>>
>> The logic should be like this: Whatever we do on the host side (memory
>> allocation GFP flags) should happen with the host DMA width, whenever
>> we decide how to set addresses on the device registers we must use the
>> device DMA address width.
>>
>> This patch renames the platform address width field from addr64 (term
>> used in device datasheet) to host_addr and uses this value exclusively
>> for host side operations while all chip operations consider the device
>> DMA width as read from the device register.
>>
>> Fixes: 7cfc4486e7ea ("stmmac: intel: Configure EHL PSE0 GbE and PSE1 GbE to 32 bits DMA addressing")
>> Signed-off-by: Jochen Henneberg <jh@...neberg-systemdesign.com>
>> ---
>> V2: Fixes from checkpatch.pl for commit message
>>
>> drivers/net/ethernet/stmicro/stmmac/common.h | 1 +
>> .../net/ethernet/stmicro/stmmac/dwmac-imx.c | 2 +-
>> .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 4 +--
>> .../ethernet/stmicro/stmmac/dwmac-mediatek.c | 2 +-
>> .../net/ethernet/stmicro/stmmac/stmmac_main.c | 30 ++++++++++---------
>> include/linux/stmmac.h | 2 +-
>> 6 files changed, 22 insertions(+), 19 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
>> index 6b5d96bced47..55a728b1b708 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/common.h
>> +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
>> @@ -418,6 +418,7 @@ struct dma_features {
>> unsigned int frpbs;
>> unsigned int frpes;
>> unsigned int addr64;
>> + unsigned int host_addr;
>
> Obvious question: is host_addr an address? From the above description it
> sounds like this is more of a host address width indicator.
>
> Maybe call these "dev_addr_width" and "host_addr_width" so it's clear
> what each of these are?
You are right. I chose the name because the original field was called
addr64 which follows the naming from the chip specification. I will
switch to host_dma_width which makes it more clear that it's a DMA
address width. For both the platform field as well as the driver's
private data.
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