[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <CR8J0E9M2SFJ.3B3W26OYPWP2N@otso>
Date: Fri, 17 Mar 2023 09:47:15 +0100
From: "Luca Weiss" <luca.weiss@...rphone.com>
To: "Konrad Dybcio" <konrad.dybcio@...aro.org>,
"Bjorn Andersson" <andersson@...nel.org>,
"Andy Gross" <agross@...nel.org>,
"Michael Turquette" <mturquette@...libre.com>,
"Stephen Boyd" <sboyd@...nel.org>,
"Rob Herring" <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@...ainline.org>
Cc: "Marijn Suijten" <marijn.suijten@...ainline.org>,
"Rob Herring" <robh@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
"Konrad Dybcio" <konrad.dybcio@...ainline.org>
Subject: Re: [PATCH 2/5] arm64: dts: qcom: sm6350: Add GPUCC node
On Thu Mar 16, 2023 at 12:16 PM CET, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@...ainline.org>
>
> Add and configure a node for the GPU clock controller.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Reviewed-by: Luca Weiss <luca.weiss@...rphone.com>
> ---
> arch/arm64/boot/dts/qcom/sm6350.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> index c46bb6dab6a1..523c7edfa4b3 100644
> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> @@ -5,6 +5,7 @@
> */
>
> #include <dt-bindings/clock/qcom,gcc-sm6350.h>
> +#include <dt-bindings/clock/qcom,gpucc-sm6350.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/clock/qcom,sm6350-camcc.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> @@ -1125,6 +1126,20 @@ compute-cb@5 {
> };
> };
>
> + gpucc: clock-controller@...0000 {
> + compatible = "qcom,sm6350-gpucc";
> + reg = <0 0x03d90000 0 0x9000>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_GPU_GPLL0_CLK>,
> + <&gcc GCC_GPU_GPLL0_DIV_CLK>;
> + clock-names = "bi_tcxo",
> + "gcc_gpu_gpll0_clk",
> + "gcc_gpu_gpll0_div_clk";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> mpss: remoteproc@...0000 {
> compatible = "qcom,sm6350-mpss-pas";
> reg = <0x0 0x04080000 0x0 0x4040>;
>
> --
> 2.39.2
Powered by blists - more mailing lists