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Message-Id: <20230317113238.142970-5-mie@igel.co.jp>
Date: Fri, 17 Mar 2023 20:32:31 +0900
From: Shunsuke Mie <mie@...l.co.jp>
To: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
Cc: Vinod Koul <vkoul@...nel.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Manivannan Sadhasivam <mani@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Shunsuke Mie <mie@...l.co.jp>,
Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
Frank Li <Frank.Li@....com>, linux-kernel@...r.kernel.org,
dmaengine@...r.kernel.org, linux-pci@...r.kernel.org
Subject: [RFC PATCH 04/11] PCI: endpoint: functions/pci-epf-test: Move common difinitions to header file
The pci-epf-test and pci_endpoint_test drivers communicate by registers on
PCIe BAR. The register details are duplicated in their code respectively.
Move a common part to an introduced header file from pci-epf-test.
Signed-off-by: Shunsuke Mie <mie@...l.co.jp>
---
drivers/pci/endpoint/functions/pci-epf-test.c | 37 +---------
include/linux/pci-epf-test.h | 67 +++++++++++++++++++
2 files changed, 68 insertions(+), 36 deletions(-)
create mode 100644 include/linux/pci-epf-test.h
diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index 6955a3d2eb7e..99d8a05b8507 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -17,31 +17,9 @@
#include <linux/pci-epc.h>
#include <linux/pci-epf.h>
+#include <linux/pci-epf-test.h>
#include <linux/pci_regs.h>
-#define IRQ_TYPE_LEGACY 0
-#define IRQ_TYPE_MSI 1
-#define IRQ_TYPE_MSIX 2
-
-#define COMMAND_RAISE_LEGACY_IRQ BIT(0)
-#define COMMAND_RAISE_MSI_IRQ BIT(1)
-#define COMMAND_RAISE_MSIX_IRQ BIT(2)
-#define COMMAND_READ BIT(3)
-#define COMMAND_WRITE BIT(4)
-#define COMMAND_COPY BIT(5)
-
-#define STATUS_READ_SUCCESS BIT(0)
-#define STATUS_READ_FAIL BIT(1)
-#define STATUS_WRITE_SUCCESS BIT(2)
-#define STATUS_WRITE_FAIL BIT(3)
-#define STATUS_COPY_SUCCESS BIT(4)
-#define STATUS_COPY_FAIL BIT(5)
-#define STATUS_IRQ_RAISED BIT(6)
-#define STATUS_SRC_ADDR_INVALID BIT(7)
-#define STATUS_DST_ADDR_INVALID BIT(8)
-
-#define FLAG_USE_DMA BIT(0)
-
#define TIMER_RESOLUTION 1
static struct workqueue_struct *kpcitest_workqueue;
@@ -60,19 +38,6 @@ struct pci_epf_test {
const struct pci_epc_features *epc_features;
};
-struct pci_epf_test_reg {
- u32 magic;
- u32 command;
- u32 status;
- u64 src_addr;
- u64 dst_addr;
- u32 size;
- u32 checksum;
- u32 irq_type;
- u32 irq_number;
- u32 flags;
-} __packed;
-
static struct pci_epf_header test_header = {
.vendorid = PCI_ANY_ID,
.deviceid = PCI_ANY_ID,
diff --git a/include/linux/pci-epf-test.h b/include/linux/pci-epf-test.h
new file mode 100644
index 000000000000..636057c3377f
--- /dev/null
+++ b/include/linux/pci-epf-test.h
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __PCI_EPF_TEST_H
+#define __PCI_EPF_TEST_H
+
+struct pci_epf_test_reg {
+#define PCI_ENDPOINT_TEST_MAGIC offsetof(struct pci_epf_test_reg, magic)
+ u32 magic;
+#define PCI_ENDPOINT_TEST_COMMAND offsetof(struct pci_epf_test_reg, command)
+#define COMMAND_RAISE_LEGACY_IRQ BIT(0)
+#define COMMAND_RAISE_MSI_IRQ BIT(1)
+#define COMMAND_RAISE_MSIX_IRQ BIT(2)
+#define COMMAND_READ BIT(3)
+#define COMMAND_WRITE BIT(4)
+#define COMMAND_COPY BIT(5)
+ u32 command;
+#define STATUS_READ_SUCCESS BIT(0)
+#define STATUS_READ_FAIL BIT(1)
+#define STATUS_WRITE_SUCCESS BIT(2)
+#define STATUS_WRITE_FAIL BIT(3)
+#define STATUS_COPY_SUCCESS BIT(4)
+#define STATUS_COPY_FAIL BIT(5)
+#define STATUS_IRQ_RAISED BIT(6)
+#define STATUS_SRC_ADDR_INVALID BIT(7)
+#define STATUS_DST_ADDR_INVALID BIT(8)
+#define PCI_ENDPOINT_TEST_STATUS offsetof(struct pci_epf_test_reg, status)
+ u32 status;
+ union {
+#define PCI_ENDPOINT_TEST_SRC_ADDR offsetof(struct pci_epf_test_reg, src_addr)
+ u64 src_addr;
+ struct {
+#define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR offsetof(struct pci_epf_test_reg, src_low)
+ u32 src_low;
+#define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR offsetof(struct pci_epf_test_reg, src_high)
+ u32 src_high;
+ } __packed;
+ };
+ union {
+#define PCI_ENDPOINT_TEST_DST_ADDR offsetof(struct pci_epf_test_reg, dst_addr)
+ u64 dst_addr;
+ struct {
+#define PCI_ENDPOINT_TEST_LOWER_DST_ADDR offsetof(struct pci_epf_test_reg, dst_low)
+ u32 dst_low;
+#define PCI_ENDPOINT_TEST_UPPER_DST_ADDR offsetof(struct pci_epf_test_reg, dst_high)
+ u32 dst_high;
+ } __packed;
+ };
+#define PCI_ENDPOINT_TEST_SIZE offsetof(struct pci_epf_test_reg, size)
+ u32 size;
+#define PCI_ENDPOINT_TEST_COUNT offsetof(struct pci_epf_test_reg, count)
+ u32 count;
+#define PCI_ENDPOINT_TEST_CHECKSUM offsetof(struct pci_epf_test_reg, checksum)
+ u32 checksum;
+#define PCI_ENDPOINT_TEST_IRQ_TYPE offsetof(struct pci_epf_test_reg, irq_type)
+#define IRQ_TYPE_UNDEFINED -1
+#define IRQ_TYPE_LEGACY 0
+#define IRQ_TYPE_MSI 1
+#define IRQ_TYPE_MSIX 2
+ u32 irq_type;
+#define PCI_ENDPOINT_TEST_IRQ_NUMBER offsetof(struct pci_epf_test_reg, irq_number)
+ u32 irq_number;
+#define PCI_ENDPOINT_TEST_FLAGS offsetof(struct pci_epf_test_reg, flags)
+#define FLAG_USE_DMA BIT(0)
+ u32 flags;
+} __packed;
+
+#endif /* __PCI_EPF_TEST_H */
--
2.25.1
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