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Message-ID: <ZBR6SWDjZs3X2NUd@yaz-fattaah>
Date: Fri, 17 Mar 2023 14:33:45 +0000
From: Yazen Ghannam <yazen.ghannam@....com>
To: Ingo Molnar <mingo@...nel.org>
Cc: Avadhut Naik <avadnaik@....com>, linux-edac@...r.kernel.org,
x86@...nel.org, linux-kernel@...r.kernel.org, bp@...en8.de,
tony.luck@...el.com
Subject: Re: [PATCH v1 3/3] x86/MCE/AMD: Handle reassigned bit definitions
for CS SMCA
On Tue, Jan 17, 2023 at 10:23:09AM +0100, Ingo Molnar wrote:
>
> * Avadhut Naik <avadnaik@....com> wrote:
>
> > @@ -178,6 +178,8 @@ static const struct smca_hwid smca_hwid_mcatypes[] = {
> > { SMCA_CS, HWID_MCATYPE(0x2E, 0x0) },
> > { SMCA_PIE, HWID_MCATYPE(0x2E, 0x1) },
> > { SMCA_CS_V2, HWID_MCATYPE(0x2E, 0x2) },
> > + /* Software defined SMCA bank type to handle erratum 1384*/
> > + { SMCA_CS_V2_QUIRK, HWID_MCATYPE(0x0, 0x1) },
> >
> > /* Unified Memory Controller MCA type */
> > { SMCA_UMC, HWID_MCATYPE(0x96, 0x0) },
> > @@ -259,6 +261,17 @@ static inline void fixup_hwid(unsigned int *hwid_mcatype)
> >
> > if (c->x86 == 0x19) {
> > switch (c->x86_model) {
> > + /*
> > + * Per Genoa's revision guide, erratum 1384, some SMCA Extended
> > + * Error Codes and SMCA Control bits are incorrect for SMCA CS
> > + * bank type.
> > + */
> > + case 0x10 ... 0x1F:
> > + case 0x60 ... 0x7B:
> > + case 0xA0 ... 0xAF:
> > + if (*hwid_mcatype == HWID_MCATYPE(0x2E, 0x2))
> > + *hwid_mcatype = HWID_MCATYPE(0x0, 0x1);
>
> Why are we open-coding these types?
>
> Why not use smca_hwid_mcatypes[SMCA_CS_V2], etc.?
>
Hi Ingo,
Is this what you mean?
if (*hwid_mcatype == smca_hwid_mcatypes[SMCA_CS_V2].hwid_mcatype)
*hwid_mcatype = smca_hwid_mcatypes[SMCA_CS_V2_QUIRK].hwid_mcatype;
I think that's a good idea.
Avadhut,
Can you please make this change here and in the other patch?
Thanks,
Yazen
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