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Message-ID: <7cc8258c-3a77-5387-aaa4-658761fbb0ae@gmail.com>
Date:   Sat, 18 Mar 2023 21:17:40 +0800
From:   Jacky Huang <ychuang570808@...il.com>
To:     Arnd Bergmann <arnd@...db.de>, Rob Herring <robh+dt@...nel.org>,
        krzysztof.kozlowski+dt@...aro.org, Lee Jones <lee@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>
Cc:     devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org,
        schung@...oton.com, Jacky Huang <ychuang3@...oton.com>
Subject: Re: [PATCH 11/15] arm64: dts: nuvoton: Add initial ma35d1 device tree

Dear Arnd,


Thanks for your suggestion.


On 2023/3/16 下午 10:17, Arnd Bergmann wrote:
> On Wed, Mar 15, 2023, at 08:28, Jacky Huang wrote:
>> +	mem: memory@...00000 {
>> +		device_type = "memory";
>> +		reg = <0x00000000 0x80000000 0 0x20000000>; /* 512M DRAM */
>> +	};
>> +};
> In most machines, the memory size is detected by the boot loader
> and filled in the dtb in memory before starting the kernel, so
> you should not need two separate files here for the two common
> memory configurations.


On ma35d1, memory size is determined early before uboot.

BL1 (MaskROM boot code) -> BL2 (arm-trust-firmware) -> BL32 (op-tee) & 
BL33 (uboot).

The DDR was initialized in BL2 stage with a selected DDR setting, which

is hard coded, including DDR size.

We searched the arm64 dts and found that almost all vendors claimed

memory size in board level dtsi/dts. This seems to be common.

So, can we have it unchanged?


> Since the machine is called 'som', I would assume that this is a
> module that is integrated on another board, so more commonly one
> would have a dtsi file for the som in addition to the one for the
> soc, and have all the components of the module listed in this
> file, while the dts file that includes the som.dtsi lists the
> devices on the carrier board and enables the on-chip devices
> that are connected to the outside.
>
>         Arnd


You are right, ma35d1 som have a base board, and a cpu board on it.

It is a good suggestion that we should have a dtsi for som base board.

Consider that we are in the initial submit, and such a dtsi will be an empty

file at this stage. So, I would like to do it when peripheral drivers

upstream started. Is it ok?


Best  regards,

Jacky Huang


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