linux-kernel - Re: [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator

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Message-ID: <6294ffee-3c66-5287-59b4-068a7f4e84ba@starfivetech.com>
Date:   Sun, 19 Mar 2023 21:28:04 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     Conor Dooley <conor@...nel.org>
CC:     <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, Stephen Boyd <sboyd@...nel.org>,
        "Michael Turquette" <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Ben Dooks <ben.dooks@...ive.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        "Emil Renner Berthing" <emil.renner.berthing@...onical.com>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110
 always-on clock and reset generator

On Sat, 11 Mar 2023 13:14:45 +0000, Conor Dooley wrote:
> On Sat, Mar 11, 2023 at 05:07:24PM +0800, Hal Feng wrote:
>> From: Emil Renner Berthing <kernel@...il.dk>
>> 
>> Add bindings for the always-on clock and reset generator (AONCRG) on the
>> JH7110 RISC-V SoC by StarFive Ltd.
>> 
>> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
>> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
>> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml
>> @@ -0,0 +1,107 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 Always-On Clock and Reset Generator
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@...il.dk>
>> +
>> +properties:
>> +  compatible:
>> +    const: starfive,jh7110-aoncrg
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    oneOf:
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
>> +          - description: STG AXI/AHB
>> +          - description: APB Bus
>> +          - description: GMAC0 GTX
>> +
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
>> +          - description: STG AXI/AHB or GMAC0 RGMII RX
>> +          - description: APB Bus or STG AXI/AHB
>> +          - description: GMAC0 GTX or APB Bus
>> +          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX
> 
> Something tells me that the use of "or" means we're not doing this
> correctly.
> Otherwise,
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

There are two possible cases when the number of clock inputs is 6:

Main Oscillator
GMAC0 RMII reference or GMAC0 RGMII RX
STG AXI/AHB
APB Bus
GMAC0 GTX
RTC Oscillator

and

Main Oscillator
GMAC0 RMII reference
GMAC0 RGMII RX
STG AXI/AHB
APB Bus
GMAC0 GTX

So I used the "or" in the items descriptions. Thanks.

Best regards,
Hal

> 
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference
>> +          - description: GMAC0 RGMII RX
>> +          - description: STG AXI/AHB
>> +          - description: APB Bus
>> +          - description: GMAC0 GTX
>> +          - description: RTC Oscillator (32.768 kHz)
>> +
>> +  clock-names:
>> +    oneOf:
>> +      - minItems: 5
>> +        items:
>> +          - const: osc
>> +          - enum:
>> +              - gmac0_rmii_refin
>> +              - gmac0_rgmii_rxin
>> +          - const: stg_axiahb
>> +          - const: apb_bus
>> +          - const: gmac0_gtxclk
>> +          - const: rtc_osc
>> +
>> +      - minItems: 6
>> +        items:
>> +          - const: osc
>> +          - const: gmac0_rmii_refin
>> +          - const: gmac0_rgmii_rxin
>> +          - const: stg_axiahb
>> +          - const: apb_bus
>> +          - const: gmac0_gtxclk
>> +          - const: rtc_osc
>