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Date:   Mon, 20 Mar 2023 10:40:05 -0500
From:   Rob Herring <robh@...nel.org>
To:     Julien Panis <jpanis@...libre.com>
Cc:     lee@...nel.org, krzysztof.kozlowski+dt@...aro.org, corbet@....net,
        arnd@...db.de, gregkh@...uxfoundation.org,
        derek.kiernan@...inx.com, dragan.cvetic@...inx.com,
        eric.auger@...hat.com, jgg@...pe.ca, razor@...ckwall.org,
        stephen@...workplumber.org, davem@...emloft.net,
        christian.koenig@....com, contact@...rsion.fr,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-doc@...r.kernel.org, sterzik@...com, u-kumar1@...com,
        eblanc@...libre.com, jneanne@...libre.com
Subject: Re: [PATCH v2 0/4] TI TPS6594 PMIC support (Core, ESM, PFSM)

On Wed, Mar 15, 2023 at 12:07:32PM +0100, Julien Panis wrote:
> TPS6594 is a Power Management IC which provides regulators and others
> features like GPIOs, RTC, watchdog, ESMs (Error Signal Monitor), and
> PFSM (Pre-configurable Finite State Machine). The SoC and the PMIC can
> communicate through the I2C or SPI interfaces.
> TPS6594 is the super-set device while TPS6593 and LP8764X are derivatives.
> 
> This series adds support to TI TPS6594 PMIC and its derivatives.
> 
> The features implemented in this series are:
> - Core (MFD I2C and SPI entry points)
> - ESM (child device)
> - PFSM (child device)
> 
> - Core description:
> I2C and SPI interface protocols are implemented, with and without
> the bit-integrity error detection feature (CRC mode).
> In multi-PMIC configuration, all instances share a single GPIO of
> the SoC to generate interrupt requests via their respective nINT
> output pin.
> 
> - ESM description:
> This device monitors the SoC error output signal at its nERR_SOC
> input pin. In error condition, ESM toggles its nRSTOUT_SOC pin
> to reset the SoC.
> Basically, ESM driver starts ESM hardware.
> 
> - PFSM description:
> Strictly speaking, PFSM is not hardware. It is a piece of code.
> PMIC integrates a state machine which manages operational modes.
> Depending on the current operational mode, some voltage domains
> remain energized while others can be off.
> PFSM driver can be used to trigger transitions between configured
> states.
> 
> Link to v1:
> https://lore.kernel.org/all/20230216114410.183489-1-jpanis@baylibre.com/
> 
> Others series will be submitted over the next few weeks, providing
> drivers for others child devices like GPIOs (pinctrl), RTC, and
> regulators. Board support will also be added (device trees).

I don't care about the drivers, but I need a complete binding for 
the device to review it.

Rob

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