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Message-ID: <0453c753-681e-4d42-65e5-a5967697f6ca@os.amperecomputing.com>
Date: Mon, 20 Mar 2023 10:21:51 -0700
From: Yang Shi <yang@...amperecomputing.com>
To: rafael@...nel.org, viresh.kumar@...aro.org,
george.cherian@...ium.com, pprakash@...eaurora.org
Cc: scott@...amperecomputing.com, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [QUESTION] The delay between sampling for CPPC
Hi folks,
When testing CPPC cpufreq on our platform, we noticed the error may be
quite high and it (high error) may happen quite often. For example, our
platform max freq is 2.8GHz, when the CPUs were fully loaded (100%
load), we saw cpuinfo_cur_freq may show 4GHz, it means > 40% error. And
the high error (> 1%) happened 256 times out of 2127 samples (sampled
every 3 seconds) in 2hrs test.
We tried to change the delay to 100us, things got improved although we
still saw high error, but it happened much less often (22 times out of
3623 samples).
So why was 2us used as the delay? Does it make sense to use a larger
delay, for example, 100us used by our test, or even larger, for example,
ms granularity?
Thanks,
Yang
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