| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20230320073816.3012198-1-bhupesh.sharma@linaro.org>
Date: Mon, 20 Mar 2023 13:08:16 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: devicetree@...r.kernel.org
Cc: agross@...nel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, andersson@...nel.org,
bhupesh.sharma@...aro.org, bhupesh.linux@...il.com,
linux-crypto@...r.kernel.org, krzysztof.kozlowski@...aro.org,
robh+dt@...nel.org, konrad.dybcio@...aro.org,
vladimir.zapolskiy@...aro.org
Subject: [PATCH 1/1] dt-bindings: qcom-qce: Add compatibles for SM6115 and QCS2290
Crypto Engine block on Qualcomm SoCs SM6115 and QCS2290
do not require clocks strictly, so add compatibles for these
SoCs, indicating that they are similar to the flavour
found on SM8150.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
---
Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index e375bd981300..e6840d124af3 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -35,10 +35,12 @@ properties:
- items:
- enum:
+ - qcom,sm6115-qce
- qcom,sm8250-qce
- qcom,sm8350-qce
- qcom,sm8450-qce
- qcom,sm8550-qce
+ - qcom,qcs2290-qce
- const: qcom,sm8150-qce
- const: qcom,qce
--
2.38.1
Powered by blists - more mailing lists