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Message-ID: <20230320081133.23655-6-chiawei_wang@aspeedtech.com>
Date:   Mon, 20 Mar 2023 16:11:33 +0800
From:   Chia-Wei Wang <chiawei_wang@...eedtech.com>
To:     <vkoul@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <joel@....id.au>,
        <andrew@...id.au>, <gregkh@...uxfoundation.org>,
        <jirislaby@...nel.org>, <pmenzel@...gen.mpg.de>,
        <ilpo.jarvinen@...ux.intel.com>, <hdanton@...a.com>,
        <dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-aspeed@...ts.ozlabs.org>, <linux-kernel@...r.kernel.org>,
        <linux-serial@...r.kernel.org>, <openbmc@...ts.ozlabs.org>
Subject: [PATCH v3 5/5] ARM: dts: aspeed-g6: Add UDMA node

Add the device tree node for the UART DMA (UDMA) controller.

Signed-off-by: Chia-Wei Wang <chiawei_wang@...eedtech.com>
---
 arch/arm/boot/dts/aspeed-g6.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 8246a60de0d0..172dd748d807 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -863,6 +863,15 @@ fsim1: fsi@...9b100 {
 				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
 				status = "disabled";
 			};
+
+			udma: dma-controller@...9e000 {
+				compatible = "aspeed,ast2600-udma";
+				reg = <0x1e79e000 0x1000>;
+				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+				dma-channels = <28>;
+				#dma-cells = <1>;
+				status = "disabled";
+			};
 		};
 	};
 };
-- 
2.25.1

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