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Message-ID: <20230320095931.2651714-1-sai.krishna.potthuri@amd.com>
Date: Mon, 20 Mar 2023 15:29:29 +0530
From: Sai Krishna Potthuri <sai.krishna.potthuri@....com>
To: Mark Brown <broonie@...nel.org>
CC: <linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<git@....com>, <saikrishna12468@...il.com>,
Sai Krishna Potthuri <sai.krishna.potthuri@....com>
Subject: [PATCH 0/2] spi: cadence-quadspi: Fix random issues with Xilinx Versal DMA read
Update Xilinx Versal external DMA read logic to fix random issues
- Instead of having the fixed timeout, update the read timeout based on
the length of the transfer to avoid timeout for larger data size.
- While switching between external DMA read and indirect read, disable the
SPI before configuration and enable it after configuration as recommended
by Octal-SPI Flash Controller specification.
Sai Krishna Potthuri (2):
spi: cadence-quadspi: Update the read timeout based on the length
spi: cadence-quadspi: Disable the SPI before reconfiguring
drivers/spi/spi-cadence-quadspi.c | 40 ++++++++++++++++++-------------
1 file changed, 24 insertions(+), 16 deletions(-)
--
2.25.1
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