linux-kernel - Re: [PATCH 1/1] drm/sun4i: tcon: Fix setting PLL rate when using DSI

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Message-ID: <20230321145739.jlpbzplsc27dlh7v@houat>
Date:   Tue, 21 Mar 2023 15:57:39 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     Frank Oltmanns <frank@...manns.dev>
Cc:     jagan@...rulasolutions.com, michael@...rulasolutions.com,
        Chen-Yu Tsai <wens@...e.org>, David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Samuel Holland <samuel@...lland.org>,
        "open list:DRM DRIVERS FOR ALLWINNER A10" 
        <dri-devel@...ts.freedesktop.org>,
        "moderated list:ARM/Allwinner sunXi SoC support" 
        <linux-arm-kernel@...ts.infradead.org>,
        "open list:ARM/Allwinner sunXi SoC support" 
        <linux-sunxi@...ts.linux.dev>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] drm/sun4i: tcon: Fix setting PLL rate when using DSI

Hi,

On Sun, Mar 19, 2023 at 05:07:04PM +0100, Frank Oltmanns wrote:
> Set the required PLL rate by adjusting the dotclock rate when calling
> clk_set_rate() when using DSI.
> 
> According to the Allwinners A64's BSP code, a TCON divider of 4 has to
> be used and the PLL rate needs to be set to the following frequency when
> using DSI:
>     PLL rate = DCLK * bpp / lanes
> 
> After this change the common mode set function would only contain
> setting the resolution. Therefore, dissolve the function and transfer
> the functionality to the individual mode set functions.
> 
> Signed-off-by: Frank Oltmanns <frank@...manns.dev>

This is similar to:
https://lore.kernel.org/all/20230320161636.24411-1-romanberanek@icloud.com/

What's the story there?

Maxime

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