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Message-ID: <22291092.EfDdHjke4D@diego>
Date: Tue, 21 Mar 2023 21:25:56 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Palmer Dabbelt <palmer@...osinc.com>,
Evan Green <evan@...osinc.com>
Cc: slewis@...osinc.com, Conor Dooley <conor@...nel.org>,
vineetg@...osinc.com, Evan Green <evan@...osinc.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Albert Ou <aou@...s.berkeley.edu>,
Andrew Bresticker <abrestic@...osinc.com>,
Celeste Liu <coelacanthus@...look.com>,
Guo Ren <guoren@...nel.org>, Jonathan Corbet <corbet@....net>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v4 3/6] RISC-V: hwprobe: Add support for
RISCV_HWPROBE_BASE_BEHAVIOR_IMA
Am Dienstag, 14. März 2023, 19:32:17 CET schrieb Evan Green:
> We have an implicit set of base behaviors that userspace depends on,
> which are mostly defined in various ISA specifications.
>
> Co-developed-by: Palmer Dabbelt <palmer@...osinc.com>
> Signed-off-by: Palmer Dabbelt <palmer@...osinc.com>
> Signed-off-by: Evan Green <evan@...osinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
This needs one fix, described blow, with that applied:
Reviewed-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> + case RISCV_HWPROBE_KEY_IMA_EXT_0:
> + pair->value = 0;
> + if (has_fpu())
> + pair->value |= RISCV_HWPROBE_IMA_FD;
> +
> + if (elf_hwcap & RISCV_ISA_EXT_c)
This wants to be
if (elf_hwcap & riscv_isa_extension_mask(c))
i.e. elf_hwcap is a bitmap, RISCV_ISA_EXT_c is the number "2" and
riscv_isa_extension_mask() will get you the shifted bit.
> + pair->value |= RISCV_HWPROBE_IMA_C;
> +
> + break;
>
> /*
> * For forward compatibility, unknown keys don't fail the whole
>
Heiko
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