linux-kernel - Re: [PATCH v2 1/9] dt-bindings: clock: add mtmips SoCs system controller

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Message-ID: <CAMhs-H_dSgcPNQVusHWVvztYHptOxSJ_o7G0eU9=M1C7RXdsVw@mail.gmail.com>
Date:   Tue, 21 Mar 2023 08:00:37 +0100
From:   Sergio Paracuellos <sergio.paracuellos@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     linux-clk@...r.kernel.org, linux-mips@...r.kernel.org,
        tsbogend@...ha.franken.de, john@...ozen.org,
        linux-kernel@...r.kernel.org, p.zabel@...gutronix.de,
        mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
        devicetree@...r.kernel.org, arinc.unal@...nc9.com
Subject: Re: [PATCH v2 1/9] dt-bindings: clock: add mtmips SoCs system controller

On Tue, Mar 21, 2023 at 7:45 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 21/03/2023 06:00, Sergio Paracuellos wrote:
> > Adds device tree binding documentation for system controller node present
> > in Mediatek MIPS and Ralink SOCs. This node is a clock and reset provider
> > for the rest of the world. This covers RT2880, RT3050, RT3052, RT3350,
> > RT3883, RT5350, MT7620, MT7628 and MT7688 SoCs.
> >
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@...il.com>
> > ---
> >  .../bindings/clock/mediatek,mtmips-sysc.yaml  | 65 +++++++++++++++++++
> >  1 file changed, 65 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
> > new file mode 100644
> > index 000000000000..f07e1652723b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
> > @@ -0,0 +1,65 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/mediatek,mtmips-sysc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MTMIPS SoCs System Controller
> > +
> > +maintainers:
> > +  - Sergio Paracuellos <sergio.paracuellos@...il.com>
> > +
> > +description: |
> > +  MediaTek MIPS and Ralink SoCs provides a system controller to allow
> > +  to access to system control registers. These registers include clock
> > +  and reset related ones so this node is both clock and reset provider
> > +  for the rest of the world.
> > +
> > +  These SoCs have an XTAL from where the cpu clock is
> > +  provided as well as derived clocks for the bus and the peripherals.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - ralink,mt7620-sysc
>
> Since you decided to send it before we finish discussion:
> NAK - this is already used as mediatek

Sorry, there was too much stuff commented so I preferred to clean up
all of them while maintaining the compatibles with the ralink prefix
instead since that was where the current discussion was at that point.

>
> > +          - ralink,mt7620a-sysc

As I have said, this one exists:

arch/mips/ralink/mt7620.c:      rt_sysc_membase =
plat_of_remap_node("ralink,mt7620a-sysc");


> > +          - ralink,mt7628-sysc
>
> Same here.
>
> > +          - ralink,mt7688-sysc
>
> I expect you to check the others.

I can change others to mediatek but that would be a bit weird, don't you think?

>
>
>
> Best regards,
> Krzysztof
>

Thanks,
    Sergio Paracuellos