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Message-ID: <3f5e01bd-24ee-66cc-1a5d-b3fc09c2a96d@linaro.org>
Date:   Tue, 21 Mar 2023 08:14:03 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Xingyu Wu <xingyu.wu@...rfivetech.com>,
        linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Samin Guo <samin.guo@...rfivetech.com>,
        linux-kernel@...r.kernel.org, Conor Dooley <conor@...nel.org>
Subject: Re: [PATCH v2 1/3] dt-bindings: timer: Add timer for StarFive JH7110
 SoC

On 20/03/2023 14:54, Xingyu Wu wrote:
> Add bindings for the timer on the JH7110 RISC-V SoC
> by StarFive Technology Ltd.
> 
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
> ---
>  .../bindings/timer/starfive,jh7110-timer.yaml | 95 +++++++++++++++++++
>  1 file changed, 95 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/starfive,jh7110-timer.yaml
> 
> diff --git a/Documentation/devicetree/bindings/timer/starfive,jh7110-timer.yaml b/Documentation/devicetree/bindings/timer/starfive,jh7110-timer.yaml
> new file mode 100644
> index 000000000000..24b34618f2c8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/starfive,jh7110-timer.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/starfive,jh7110-timer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 Timer

Actually one change is needed - missing blank line.

> +maintainers:
> +  - Xingyu Wu <xingyu.wu@...rfivetech.com>
> +  - Samin Guo <samin.guo@...rfivetech.com>
> +


Best regards,
Krzysztof

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